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AT89C5122D-RDRUM 数据表(PDF) 153 Page - ATMEL Corporation |
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AT89C5122D-RDRUM 数据表(HTML) 153 Page - ATMEL Corporation |
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153 / 208 page  153 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 Keyboard Interface Only for AT8xC5122. Introduction The AT83R5122, AT8xC5122/23 implements a keyboard interface allowing the connec- tion of a 8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt capability on both high or low level. These inputs are available as alternate function of P5 and allow to exit from idle and power-down modes. Description The keyboard interfaces with the C51 core through 3 special function registers: KBLS, the Keyboard Level Selection register (Table 96 on page 156), KBE, The Keyboard interrupt Enable register (Table 95 on page 155), and KBF, the Keyboard Flag register (Table ). Interrupt The keyboard inputs are considered as 8 independent interrupt sources sharing the same interrupt vector. An interrupt enable bit ( KBD in IE1) allows global enable or dis- able of the keyboard interrupt (see Figure 97). As detailed in Figure 98 each keyboard input has the capability to detect a programmable level according to KBLS.x bit value. Level detection is then reported in interrupt flags KBF.x that can be masked by software using KBE.x bits. This structure allows keyboard arrangement from 1 by n to 8 by n matrix and allows usage of P5 inputs for other purpose. The KBF.x flags are set by hardware when an active level is on input P5.x. They are automatically reset after any read access on KBF. If the content of KBF must be ana- lyzed, the first read instruction must transfer KBF contend to another location. The KBF register cannot be written by software. Figure 97. Keyboard Interface Block Diagram Figure 98. Keyboard Input Circuitry P5.0 Keyboard Interface Interrupt Request EKB IEN1.0 Input Circuitry P5.1 Input Circuitry P5.2 Input Circuitry P5.3 Input Circuitry P5.4 Input Circuitry P5.5 Input Circuitry P5.6 Input Circuitry P5.7 Input Circuitry KBDIT P5.x KBE.x KBF.x KBLS.x 0 1 |
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