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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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AT89C5122D-RDRUM 数据表(PDF) 196 Page - ATMEL Corporation |
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AT89C5122D-RDRUM 数据表(HTML) 196 Page - ATMEL Corporation |
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196 / 208 page  196 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 Shift Register Timing Waveform External Clock Drive Characteristics (XTAL1) Table 120. AC Parameters External Clock Drive Waveforms AC Testing Input/Output Waveforms AC inputs during testing are driven at VCC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing measurement are made at VIH min for a logic “1” and VIL max for a logic “0”. VALID VALID VALID VALID VALID VALID INPUT DATA VALID 01 2 345 6 8 7 ALE CLOCK OUTPUT DATA WRITE to SBUF CLEAR RI TXLXL TQVXH TXHQX TXHDV TXHDX SET TI SET RI INSTRUCTION 01 2345 6 7 VALID Symbol Parameter Min Max Units TCLCL Oscillator Period 125 ns TCHCX High Time 5 ns TCLCX Low Time 5 ns TCLCH Rise Time 5 ns TCHCL Fall Time 5 ns TCHCX/TCLCX Cyclic ratio in X2 mode 40 60 % VCC-0.5V 0.45V 0.7VCC 0.2VCC-0.1 TCHCL TCLCX TCLCL TCLCH TCHCX INPUT/OUTPUT 0.2 VCC + 0.9 0.2 VCC - 0.1 VCC -0.5V 0.45V |
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