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AT89C5122D-RDRUM 数据表(PDF) 198 Page - ATMEL Corporation |
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AT89C5122D-RDRUM 数据表(HTML) 198 Page - ATMEL Corporation |
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198 / 208 page  198 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 This diagram indicates when signals are clocked internally. The time it takes the signals to propagate to the pins, however, ranges from 25 to 125 ns. This propagation delay is dependent on variables such as temperature and pin loading. Propagation also varies from output to output and component. Typically though (TA=25°C fully loaded) RD and WR propagation delays are approximately 50 ns. The other signals are typically 85 ns. Propagation delays are incorporated in the AC specifications. USB Interface Rise Time Fall Time VCRS Differential Data Lines 90% 10% 90% 10% tR tF VHmin VLmax Symbol Parameter Min Typ(5) Max Unit tR Rise Time 4 20 ns tF Fall Time 4 20 ns tFDRATE Full-speed Data Rate 11.9700 12.0300 Mb/s VCRS Crossover Voltage 1.3 2.0 V tDJ1 Source Jitter Total to next transaction -3.5 3.5 ns tDJ2 Source Jitter Total for paired transactions -4 4 ns tJR1 Receiver Jitter to next transaction -18.5 18.5 ns tJR2 Receiver Jitter for paired transactions -9 9 ns |
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