MFRC522 datasheet(18/96 Pages) NXP

18 / 96 page

MFRC522_33

Product data sheet

PUBLIC

Rev. 3 — 26 October 2009

112133

18 of 96

NXP Semiconductors

MFRC522

Contactless reader IC

8.1.4.5

7-Bit addressing

During the I2C-bus address procedure, the ﬁrst byte after the START condition is used to

determine which slave will be selected by the master.

Several address numbers are reserved. During device conﬁguration, the designer must

ensure that collisions with these reserved addresses cannot occur. Check the

I2C-bus

speciﬁcation for a complete list of reserved addresses.

The I2C-bus address speciﬁcation is dependent on the deﬁnition of pin EA. Immediately

after releasing pin NRSTPD or after a power-on reset, the device deﬁnes the I2C-bus

address according to pin EA.

If pin EA is set LOW, the upper 4 bits of the device bus address are reserved by

NXP Semiconductors and set to 0101b for all MFRC522 devices. The remaining 3 bits

(ADR_0, ADR_1, ADR_2) of the slave address can be freely conﬁgured by the customer

to prevent collisions with other I2C-bus devices.

If pin EA is set HIGH, ADR_0 to ADR_5 can be completely speciﬁed at the external pins

according to Table 5 on page 8. ADR_6 is always set to logic 0.

In both modes, the external address coding is latched immediately after releasing the

reset condition. Further changes at the used pins are not taken into consideration.

Depending on the external wiring, the I2C-bus address pins can be used for test signal

outputs.

8.1.4.6

To write data from the host controller using the I2C-bus to a speciﬁc register in the

MFRC522 the following frame format must be used.

• The ﬁrst byte of a frame indicates the device address according to the I2C-bus rules.

• The second byte indicates the register address followed by up to n-data bytes.

In one frame all data bytes are written to the same register address. This enables fast

FIFO buffer access. The Read/Write (R/W) bit is set to logic 0.

Fig 16. First byte following the START procedure

001aak591

slave address

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

R/W

MSB

LSB

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