MFRC522 datasheet(37/96 Pages) NXP

37 / 96 page

MFRC522_33

Product data sheet

PUBLIC

Rev. 3 — 26 October 2009

112133

37 of 96

NXP Semiconductors

MFRC522

Contactless reader IC

9.3.1.4

DivIEnReg register

Control bits to enable and disable the passing of interrupt requests.

9.3.1.5

ComIrqReg register

Interrupt request bits.

Table 26.

ComIEnReg register bit descriptions

Bit Symbol

Value Description

IRqInv

signal on pin IRQ is inverted with respect to the Status1Reg register’s IRq

bit

signal on pin IRQ is equal to the IRq bit; in combination with the

DivIEnReg register’s IRqPushPull bit, the default value of logic 1 ensures

that the output level on pin IRQ is 3-state

TxIEn

allows the transmitter interrupt request (TxIRq bit) to be propagated to pin

IRQ

RxIEn

allows the receiver interrupt request (RxIRq bit) to be propagated to pin

IRQ

IdleIEn

allows the idle interrupt request (IdleIRq bit) to be propagated to pin IRQ

HiAlertIEn

allows the high alert interrupt request (HiAlertIRq bit) to be propagated to

pin IRQ

LoAlertIEn -

allows the low alert interrupt request (LoAlertIRq bit) to be propagated to

pin IRQ

ErrIEn

allows the error interrupt request (ErrIRq bit) to be propagated to pin IRQ

TimerIEn

allows the timer interrupt request (TimerIRq bit) to be propagated to pin

IRQ

Table 27.

DivIEnReg register (address 03h); reset value: 00h bit allocation

Bit

Symbol

IRQPushPull

reserved

MﬁnActIEn

reserved

CRCIEn

reserved

Access

R/W

Table 28.

DivIEnReg register bit descriptions

Bit

Symbol

Value Description

IRQPushPull

pin IRQ is a standard CMOS output pin

pin IRQ is an open-drain output pin

6 to 5 reserved

reserved for future use

MﬁnActIEn

allows the MFIN active interrupt request to be propagated to

pin IRQ

reserved

reserved for future use

CRCIEn

allows the CRC interrupt request, indicated by the DivIrqReg

1 to 0 reserved

reserved for future use

Table 29.

ComIrqReg register (address 04h); reset value: 14h bit allocation

Bit

Symbol

Set1

TxIRq

RxIRq

IdleIRq

HiAlertIRq

LoAlertIRq

ErrIRq

TimerIRq

Access

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