MFRC522 datasheet(15/96 Pages) NXP

15 / 96 page

MFRC522_33

Product data sheet

PUBLIC

Rev. 3 — 26 October 2009

112133

15 of 96

NXP Semiconductors

MFRC522

Contactless reader IC

8.1.4 I2C-bus interface

An I2C-bus (Inter-IC) interface is supported to enable a low-cost, low pin count serial bus

interface to the host. The I2C-bus interface is implemented according to

NXP Semiconductors’

I2C-bus interface speciﬁcation, rev. 2.1, January 2000. The

interface can only act in Slave mode. Therefore the MFRC522 does not implement clock

generation or access arbitration.

The MFRC522 can act either as a slave receiver or slave transmitter in Standard mode,

Fast mode and High-speed mode.

SDA is a bidirectional line connected to a positive supply voltage using a current source or

a pull-up resistor. Both SDA and SCL lines are set HIGH when data is not transmitted. The

MFRC522 has a 3-state output stage to perform the wired-AND function. Data on the

I2C-bus can be transferred at data rates of up to 100 kBd in Standard mode, up to

400 kBd in Fast mode or up to 3.4 Mbit/s in High-speed mode.

If the I2C-bus interface is selected, spike suppression is activated on lines SCL and SDA

as deﬁned in the I2C-bus interface speciﬁcation.

See Table 155 on page 76 for timing requirements.

Table 14.

Address byte 0 register; address MOSI

7 (MSB)

0 (LSB)

1 = read

0 = write

reserved

address

Fig 11. I2C-bus interface

001aak590

MFRC522

SDA

SCL

I2C

ADR_[5:0]

PULL-UP

NETWORK

CONFIGURATION

WIRING

PULL-UP

NETWORK

MICROCONTROLLER

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