MFRC522 datasheet(39/96 Pages) NXP

39 / 96 page

MFRC522_33

Product data sheet

PUBLIC

Rev. 3 — 26 October 2009

112133

39 of 96

NXP Semiconductors

MFRC522

Contactless reader IC

9.3.1.7

ErrorReg register

Error bit register showing the error status of the last command executed.

[1]

Command execution clears all error bits except the TempErr bit. Cannot be set by software.

Table 33.

ErrorReg register (address 06h); reset value: 00h bit allocation

Bit

Symbol

WrErr

TempErr

reserved

BufferOvﬂ

CollErr

CRCErr

ParityErr

ProtocolErr

Access

Table 34:

ErrorReg register bit descriptions

Bit Symbol

Value Description

WrErr

data is written into the FIFO buffer by the host during the MFAuthent

command or if data is written into the FIFO buffer by the host during the

time between sending the last bit on the RF interface and receiving the

last bit on the RF interface

TempErr[1]

internal temperature sensor detects overheating, in which case the

antenna drivers are automatically switched off

reserved

reserved for future use

BufferOvﬂ

the host or a MFRC522’s internal state machine (e.g. receiver) tries to

write data to the FIFO buffer even though it is already full

CollErr

a bit-collision is detected

cleared automatically at receiver start-up phase

only valid during the bitwise anticollision at 106 kBd

always set to logic 0 during communication protocols at 212 kBd,

424 kBd and 848 kBd

CRCErr

the RxModeReg register’s RxCRCEn bit is set and the CRC calculation

fails

automatically cleared to logic 0 during receiver start-up phase

ParityErr

parity check failed

automatically cleared during receiver start-up phase

only valid for ISO/IEC 14443 A/MIFARE communication at 106 kBd

ProtocolErr

set to logic 1 if the SOF is incorrect

automatically cleared during receiver start-up phase

bit is only valid for 106 kBd

during the MFAuthent command, the ProtocolErr bit is set to logic 1 if the

number of bytes received in one data stream is incorrect

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