MFRC522 datasheet(29/96 Pages) NXP

29 / 96 page

MFRC522_33

Product data sheet

PUBLIC

Rev. 3 — 26 October 2009

112133

29 of 96

NXP Semiconductors

MFRC522

Contactless reader IC

The ComIrqReg register’s ErrIRq bit indicates an error detected by the contactless UART

during send or receive. This is indicated when any bit is set to logic 1 in register ErrorReg.

8.5 Timer unit

The MFRC522A has a timer unit which the external host can use to manage timing tasks.

The timer unit can be used in one of the following timer/counter conﬁgurations:

• Timeout counter

• Watchdog counter

• Stop watch

• Programmable one shot

• Periodical trigger

The timer unit can be used to measure the time interval between two events or to indicate

that a speciﬁc event occurred after a speciﬁc time. The timer can be triggered by events

explained in the paragraphs below. The timer does not inﬂuence any internal events, for

example, a time-out during data reception does not automatically inﬂuence the reception

process. Furthermore, several timer-related bits can be used to generate an interrupt.

The timer has an input clock of 6.78 MHz derived from the 27.12 MHz quartz crystal

oscillator. The timer consists of two stages: prescaler and counter.

The prescaler (TPrescaler) is a 12-bit counter. The reload values (TReloadVal_Hi[7:0] and

TReloadVal_Lo[7:0]) for TPrescaler can be set between 0 and 4095 in the TModeReg

The reload value for the counter is deﬁned by 16 bits between 0 and 65535 in the

TReloadReg register.

The current value of the timer is indicated in the TCounterValReg register.

When the counter reaches 0, an interrupt is automatically generated, indicated by the

ComIrqReg register’s TimerIRq bit setting. If enabled, this event can be indicated on

pin IRQ. The TimerIRq bit can be set and reset by the host. Depending on the

conﬁguration, the timer will stop at 0 or restart with the value set in the TReloadReg

The timer status is indicated by the Status1Reg register’s TRunning bit.

Table 18.

Interrupt sources

Interrupt ﬂag

Interrupt source

Trigger action

TimerIRq

timer unit

the timer counts from 1 to 0

TxIRq

transmitter

a transmitted data stream ends

CRCIRq

CRC coprocessor

all data from the FIFO buffer has been processed

RxIRq

receiver

a received data stream ends

IdleIRq

ComIrqReg register

command execution ﬁnishes

HiAlertIRq

FIFO buffer

the FIFO buffer is almost full

LoAlertIRq

FIFO buffer

the FIFO buffer is almost empty

ErrIRq

contactless UART

an error is detected

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