MFRC522 datasheet(34/96 Pages) NXP

34 / 96 page

MFRC522_33

Product data sheet

PUBLIC

Rev. 3 — 26 October 2009

112133

34 of 96

NXP Semiconductors

MFRC522

Contactless reader IC

9.2 Register overview

Table 20.

MFRC522 register overview

Address

(hex)

Function

Refer to

Page 0: Command and status

00h

Reserved

reserved for future use

Table 21 on page 36

01h

CommandReg

starts and stops command execution

Table 23 on page 36

02h

ComlEnReg

enable and disable interrupt request control bits

Table 25 on page 36

03h

DivlEnReg

enable and disable interrupt request control bits

Table 27 on page 37

04h

ComIrqReg

interrupt request bits

Table 29 on page 37

05h

DivIrqReg

interrupt request bits

Table 31 on page 38

06h

ErrorReg

error bits showing the error status of the last command

executed

Table 33 on page 39

07h

Status1Reg

communication status bits

Table 35 on page 40

08h

Status2Reg

receiver and transmitter status bits

Table 37 on page 41

09h

FIFODataReg

input and output of 64 byte FIFO buffer

Table 39 on page 42

0Ah

FIFOLevelReg

number of bytes stored in the FIFO buffer

Table 41 on page 42

0Bh

WaterLevelReg

level for FIFO underﬂow and overﬂow warning

Table 43 on page 42

0Ch

ControlReg

miscellaneous control registers

Table 45 on page 43

0Dh

BitFramingReg

adjustments for bit-oriented frames

Table 47 on page 44

0Eh

CollReg

bit position of the ﬁrst bit-collision detected on the RF

interface

Table 49 on page 44

0Fh

Reserved

reserved for future use

Table 51 on page 45

Page 1: Command

10h

Reserved

reserved for future use

Table 53 on page 45

11h

ModeReg

deﬁnes general modes for transmitting and receiving

Table 55 on page 46

12h

TxModeReg

deﬁnes transmission data rate and framing

Table 57 on page 46

13h

RxModeReg

deﬁnes reception data rate and framing

Table 59 on page 47

14h

TxControlReg

controls the logical behavior of the antenna driver pins TX1

and TX2

Table 61 on page 48

15h

TxASKReg

controls the setting of the transmission modulation

Table 63 on page 49

16h

TxSelReg

selects the internal sources for the antenna driver

Table 65 on page 49

17h

RxSelReg

selects internal receiver settings

Table 67 on page 50

18h

RxThresholdReg

selects thresholds for the bit decoder

Table 69 on page 51

19h

DemodReg

deﬁnes demodulator settings

Table 71 on page 51

1Ah

Reserved

reserved for future use

Table 73 on page 52

1Bh

Reserved

reserved for future use

Table 75 on page 52

1Ch

MfTxReg

controls some MIFARE communication transmit parameters

Table 77 on page 52

1Dh

MfRxReg

controls some MIFARE communication receive parameters

Table 79 on page 53

1Eh

Reserved

reserved for future use

Table 81 on page 53

1Fh

SerialSpeedReg

selects the speed of the serial UART interface

Table 83 on page 53

Page 2: Conﬁguration

20h

Reserved

reserved for future use

Table 85 on page 54

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