EM357-RTR datasheet(53/240 Pages) ETC2

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EM351 / EM357

and JTAG mode is forced when the EM35x resets, a designer must treat all four debug GPIOs as working in

unison even though the Serial Wire interface only uses one of the GPIO, PC4.

Note:

An application must disable all debug SWJ debug functionality to reclaim any of the four GPIOs: PC0,

PC2, PC3, and PC4. Disabling SWJ debug functionality prevents external debug tools from operating, including

flash programming and high-level debug tools.

Disabling the SWJ debugger interface is accomplished by setting the GPIO_DEBUGDIS bit in the GPIO_DBGCFG

SWJ debugger interface is already active, the bit GPIO_DEBUGDIS cannot be set. When GPIO_DEBUGDIS is set,

the SWJ debugger interface can be reclaimed by activating the SWJ while the EM35x is held in reset. If the

SWJ debugger interface is forced active in this manner, the bit GPIO_FORCEDBG is set in the GPIO_DBGSTAT

port’s CRTL/STAT register in the SWJ, is set high by an external debug tool.

7.4

Reset

A full chip reset is one due to power on (low or high voltage), the nRESET pin, the watchdog, or the

SYSRESETREQ bit. A full chip reset affects the GPIO configuration as follows:

The GPIO_PxCFGH/L configurations of all pins are configured as floating inputs.

The GPIO_EXTREGEN bit is set in the GPIO_DBGCFG register, which overrides the normal configuration for

PA7.

The GPIO_DEBUGDIS bit in the GPIO_DBGCFG register is cleared, allowing Serial Wire/JTAG access to

override the normal configuration of PC0, PC2, PC3, and PC4.

7.5

Boot Configuration

nBOOTMODE is a special alternate function of PA5 that is active only during a pin reset (nRESET) or a power-

on-reset of the always-powered domain (POR HV). If nBOOTMODE is asserted (pulled or driven low) when

coming out of reset, the processor starts executing an embedded serial-link-only boot loader instead of its

normal program.

While in reset and during the subsequent power-on-reset startup delay (512 OSCHF clocks), PA5 is

automatically configured as an input with a pull-up resistor. At the end of this time, the EM35x samples

nBOOTMODE: a high level selects normal boot mode, and a low level selects the embedded serial-link-only

boot loader (serial bootload mode). Figure 7-2 shows the timing parameters for invoking serial bootload mode

from a pin (nRESET) reset. Because OSCHF is running uncalibrated during the reset sequence, the time for 512

OSCHF clocks may vary as indicated.

7-4

120-035X-000D

Preliminary

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