EM357-RTR datasheet(54/240 Pages) ETC2

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EM351 / EM357

Figure 7-2. nBOOTMODE and nRESET Timing

26 µsec min.

512 clocks:

26 µsec min – 85 µsec max

nBOOTMODE

sampled

nBOOTMODE

OSCHF

nRESET

. . .

Timing for a power-on-reset is similar except that OSCHF does not begin oscillating until up to 70 µsec after

both core and HV supplies are valid. Combined with the maximum 250 µsec allowed for HV to ramp from 0.5 V

to 1.7 V, an additional 320 µsec may be added to the 512 OSCHF clocks until nBOOTMODE is sampled.

After nBOOTMODE has been sampled, PA5 is configured as a floating input like the other GPIO configurations.

The GPIO_BOOTMODE bit in the GPIO_DBGSTAT register captures the state of nBOOTMODE so that software

may act on this signal if required.

Note:

To avoid inadvertently asserting nBOOTMODE, PA5’s capacitive load may not exceed 250 pF.

7.6

GPIO Modes

7.6.1

Analog Mode

Analog mode enables analog functions, and disconnects a pin from the digital input and output logic. Only the

following GPIO pins have analog functions:

PA4, PA5, PB5, PB6, PB7, and PC1 can be analog inputs to the ADC.

PB0 can be an external analog voltage reference input to the ADC, or it can output the internal analog

voltage reference from the ADC. The Ember software selects an internal or external voltage reference.

PC6 and PC7 can connect to an optional 32.768 kHz crystal.

Note:

When an external timing source is required, a 32.768 kHz crystal is commonly connected to PC6 and

PC7. Alternatively, when PC7 is configured as a digital input, PC7 can accept a digital external clock input.

When configured in analog mode:

The output drivers are disabled.

The internal pull-up and pull-down resistors are disabled.

The Schmitt trigger input is connected to a high logic level.

Reading GPIO_PxIN returns a constant 1.

7-5

120-035X-000D

Preliminary

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