EM357-RTR datasheet(96/240 Pages) ETC2

96 / 240 page

EM351 / EM357

The GPIO pins assigned to these signals are shown in Table 8-10.

Table 8-10. UART GPIO Usage

TXD

RXD

nCTS

nRTS

Direction

Output

Input

Output

GPIO Configuration

Alternate

Output (push-pull)

Input

Alternate

Output (push-pull)

SC1 pin

PB1

PB2

PB3

PB4

1 only used if RTS/CTS hardware flow control is enabled.

8.6.2

Set Up and Configuration

The UART baud rate clock is produced by a programmable baud generator starting from the 24 Hz clock:

MHz

baud

The integer portion of the divisor, N, is written to the SC1_UARTPER register and the fractional part, F, to the

SC1_UARTFRAC register. Table 8-11 shows the values used to generate some common baud rates and their

associated clock frequency error. The UART requires an internal clock that is at least eight times the baud

rate clock, so the minimum allowable setting for SC1_UARTPER is 8.

Table 8-11. UART Baud Rate Divisors for Common Baud Rates

Baud Rate

(bits/sec)

SC1_UARTPER

SC1_UARTFRAC

Baud Rate Error (%)

300

40000

2400

5000

4800

2500

9600

1250

19200

625

38400

312

57600

208

- 0.08

115200

104

+ 0.16

230400

+ 0.16

460800

+ 0.16

921600

+ 0.16

The UART character frame format is determined by four bits in the SC1_UARTCFG register:

SC_UART8BIT specifies the number of data bits in received and transmitted characters. If this bit is clear,

characters have 7 data bits; if set, characters have 8 data bits.

8-25

120-035X-000D

Preliminary

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