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EM357-RTR 数据表(PDF) 6 Page - List of Unclassifed Manufacturers |
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EM357-RTR 数据表(HTML) 6 Page - List of Unclassifed Manufacturers |
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6 / 240 page ![]() EM351 / EM357 Table 1-1. EM35x Pin Descriptions Pin # Signal Direction Description 1 VDD_24MHZ Power 1.8 V high-frequency oscillator supply 2 VDD_VCO Power 1.8 V VCO supply 3 RF_P I/O Differential (with RF_N) receiver input/transmitter output 4 RF_N I/O Differential (with RF_P) receiver input/transmitter output 5 VDD_RF Power 1.8 V RF supply (LNA and PA) 6 RF_TX_ALT_P O Differential (with RF_TX_ALT_N) transmitter output (optional) 7 RF_TX_ALT_N O Differential (with RF_TX_ALT_P) transmitter output (optional) 8 VDD_IF Power 1.8 V IF supply (mixers and filters) 9 NC Do not connect 10 VDD_PADSA Power Analog pad supply (1.8 V) PC5 I/O Digital I/O 11 TX_ACTIVE O Logic-level control for external Rx/Tx switch. The EM35x baseband controls TX_ACTIVE and drives it high (VDD_PADS) when in Tx mode. Select alternate output function with GPIO_PCCFGH[7:4] 12 nRESET I Active low chip reset (internal pull-up) PC6 I/O Digital I/O OSC32B I/O 32.768 kHz crystal oscillator Select analog function with GPIO_PCCFGH[11:8] 13 nTX_ACTIVE O Inverted TX_ACTIVE signal (see PC5) Select alternate output function with GPIO_PCCFGH[11:8] PC7 I/O Digital I/O OSC32A I/O 32.768 kHz crystal oscillator Select analog function with GPIO_PCCFGH[15:12] 14 OSC32_EXT I Digital 32.768 kHz clock input source 15 VREG_OUT Power Regulator output (1.8 V while awake, 0 V during deep sleep) 16 VDD_PADS Power Pads supply (2.1-3.6 V) 17 VDD_CORE Power 1.25 V digital core supply decoupling PA7 I/O High current Digital I/O Disable REG_EN with GPIO_DBGCFG[4] TIM1C4 O Timer 1 Channel 4 output Enable timer output with TIM1_CCER Select alternate output function with GPIO_PACFGH[15:12] Disable REG_EN with GPIO_DBGCFG[4] TIM1C4 I Timer 1 Channel 4 input Cannot be remapped 18 REG_EN O External regulator open drain output Enabled after reset 19 PB3 I/O Digital I/O 1-2 120-035X-000D Preliminary |
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