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ADP5050ACPZ-R7 数据表(PDF) 53 Page - Analog Devices

部件名 ADP5050ACPZ-R7
功能描述  5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator
PDF  60 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5050ACPZ-R7 数据表(HTML) 53 Page - Analog Devices

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Data Sheet
ADP5050
Rev. 0 | Page 53 of 60
REGISTER 15: INT_MASK (INTERRUPT MASK CONFIGURATION), ADDRESS 0x0F
Register 15 is used to mask or unmask various warnings for use by the interrupt (nINT) pin. When any bit in this register is masked, the
associated event does not trigger the nINT pin.
Table 47. Register 15 Bit Assignments
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
MASK_TEMP
MASK_LVIN
MASK_PWRG4
MASK_PWRG3
MASK_PWRG2
MASK_PWRG1
Table 48. INT_MASK Register, Bit Function Descriptions
Bits
Bit Name
Access
Description
[7:6]
Reserved
R/W
Reserved.
5
MASK_TEMP
R/W
0 = temperature overheat warning does not trigger the interrupt pin (default).
1 = temperature overheat warning triggers the interrupt pin.
4
MASK_LVIN
R/W
0 = low voltage input warning does not trigger the interrupt pin (default).
1 = low voltage input warning triggers the interrupt pin.
3
MASK_PWRG4
R/W
0 = power-good warning on Channel 4 does not trigger the interrupt pin (default).
1 = power-good warning on Channel 4 triggers the interrupt pin.
2
MASK_PWRG3
R/W
0 = power-good warning on Channel 3 does not trigger the interrupt pin (default).
1 = power-good warning on Channel 3 triggers the interrupt pin.
1
MASK_PWRG2
R/W
0 = power-good warning on Channel 2 does not trigger the interrupt pin (default).
1 = power-good warning on Channel 2 triggers the interrupt pin.
0
MASK_PWRG1
R/W
0 = power-good warning on Channel 1 does not trigger the interrupt pin (default).
1 = power-good warning on Channel 1 triggers the interrupt pin.
REGISTER 17: DEFAULT_SET (DEFAULT RESET), ADDRESS 0x11
The write-only Register 17 is used to reset all registers to their default values.
Table 49. Register 17 Bit Assignments
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DEFAULT_SET[7:0]
Table 50. DEFAULT_SET Register, Bit Function Descriptions
Bits
Bit Name
Access
Description
[7:0]
DEFAULT_SET[7:0]
W
To reset all registers to their default values, write 0x7F to this register.



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