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ADP5050ACPZ-R7 数据表(PDF) 56 Page - Analog Devices

部件名 ADP5050ACPZ-R7
功能描述  5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator
PDF  60 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5050ACPZ-R7 数据表(HTML) 56 Page - Analog Devices

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ADP5050
Data Sheet
Rev. 0 | Page 56 of 60
Table 63. Overvoltage Latch-Off Options for the Four Buck Regulators
Option
Description
Option 0
Latch-off function disabled for output overvoltage events (default)
Option 1
Latch-off function enabled for output overvoltage events
Table 64. I2C Address Options
Option
Description
Option 0
0x48 (default)
Option 1
0x58
Option 2
0x68
Option 3
0x78
FACTORY DEFAULT OPTIONS
Table 65 lists the factory default options programmed into the ADP5050 when the device is ordered (see the Ordering Guide). To order
the device with options other than the default options, contact your local Analog Devices sales or distribution representative. Table 51
through Table 64 list all available options for the device.
Table 65. Factory Default Options
Option
Default Value
Channel 1 output voltage
0.8 V adjustable output
Channel 2 output voltage
0.8 V adjustable output
Channel 3 output voltage
0.8 V adjustable output
Channel 4 output voltage
0.8 V adjustable output
PWRGD pin (Pin 20) function
PWRGD pin for power-good output
PWRGD pin (Pin 20) output
Monitor Channel 1 output
Output discharge function
Enabled for all four buck regulators
Switching frequency on Channel 1
1 × switching frequency set by the RT pin
Switching frequency on Channel 3
1 × switching frequency set by the RT pin
SYNC/MODE pin (Pin 43) function
Forced PWM/automatic PWM/PSM mode setting with the ability to synchronize to an external clock
Hiccup protection
Enabled for overcurrent events
Short-circuit latch-off function
Disabled for output short-circuit events
Overvoltage latch-off function
Disabled for output overvoltage events
I2C address
0x48



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