AM79C978VCSLASHW datasheet(239/261 Pages) AMD

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APPENDIX A

A-1

Am79C978

Alternative Method for

Initialization

The controller may be initialized by performing I/O

writes only. That is, data can be written directly to the

appropriate control and status registers (CSR instead

of reading from the initialization block in memory). The

registers that must be written are shown in Table A-1.

These register writes are followed by writing the

START bit in CSR0.

Note:

1. The INIT bit must not be set or the initialization block will be accessed instead.

2. Needed only if SSIZE32 =0.

3. Needed only if the physical address is different from the one stored in EEPROM or if there is no EEPROM present.

Table A-1.

Registers for Alternative Initialization Method (Note 1)

Control and Status Register

Comment

CSR2

IADR[31:16] (Note 2)

CSR8

LADRF[15:0]

CSR9

LADRF[31:16]

CSR10

LADRF[47:32]

CSR11

LADRF[63:48]

CSR12

PADR[15:0] (Note 3)

CSR13

PADR[31:16] (Note 3)

CSR14

PADR[47:32] (Note 3)

CSR15

MODE

CSR24-25

BADR

CSR30-31

BADX

CSR47

TXPOLLINT

CSR49

RXPOLLINT

CSR76

RCVRL

CSR78

XMTRL

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