AM79C978VCSLASHW datasheet(72/261 Pages) AMD

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Am79C978

Table 10.

Receive Address Match

Automatic Pad Stripping

During reception of an IEEE 802.3 frame, the pad field

can be stripped automatically. Setting ASTRP_RCV

(CSR4, bit 0) to 1 enables the automatic pad stripping

feature. The pad field will be stripped before the frame

is passed to the FIFO, thus preserving FIFO space for

additional frames. The FCS field will also be stripped,

since it is computed at the transmitting station based

on the data and pad field characters, and will be invalid

for a receive frame that has had the pad characters

stripped.

The number of bytes to be stripped is calculated from

the embedded length field (as defined in the ISO 8802-

3 (IEEE/ANSI 802.3) definition) contained in the frame.

The length indicates the actual number of LLC data

bytes contained in the message. Any received frame

which contains a length field less than 46 bytes will have

the pad field stripped (if ASTRP_RCV is set). Receive

frames which have a length field of 46 bytes or greater

will be passed to the host unmodified.

Figure 36 shows the byte/bit ordering of the received

length field for an IEEE 802.3-compatible frame format.

Since any valid Ethernet Type field value will always be

greater than a normal IEEE 802.3 Length field (

≥46),

the Am79C978 controller will not attempt to strip valid

Ethernet frames. Note that for some network protocols,

the value passed in the Ethernet Type and/or IEEE

802.3 Length field is not compliant with either standard

and may cause problems if pad stripping is enabled.

Receive FCS Checking

Reception and checking of the received FCS is per-

formed automatically by the Am79C978 controller.

Note that if the Automatic Pad Stripping feature is en-

abled, the FCS for padded frames will be verified

against the value computed for the incoming bit stream

including pad characters, but the FCS value for a pad-

ded frame will not be passed to the host. If an FCS

error is detected in any frame, the error will be reported

in the CRC bit in RMD1.

Receive Exception Conditions

Exception conditions for frame reception fall into two

distinct categories, i.e., those conditions which are the

result of normal network operation, and those which

occur due to abnormal network and/or host related

events.

Normal events which may occur and which are handled

autonomously by the Am79C978 controller are basi-

cally collisions within the slot time and automatic runt

packet rejection. The Am79C978 controller will ensure

that collisions that occur within 512 bit times from the

start of reception (excluding preamble) will be automat-

ically deleted from the receive FIFO with no host inter-

vention.

The receive FIFO will delete any frame that is com-

posed of fewer than 64 bytes provided that the Runt

Packet Accept (RPA bit in CSR124) feature has not

been enabled and the network interface is operating in

half-duplex mode, or the full-duplex Runt Packet Ac-

cept Disable bit (FDRPAD, BCR9, bit 2) is set. This cri-

terion will be met regardless of whether the receive

frame was the first (or only) frame in the FIFO or if the

receive frame was queued behind a previously re-

ceived message.

Abnormal network conditions include:

n FCS errors

n Late collision

Host related receive exception conditions include

MISS, BUFF, and OFLO. These are described in the

Buffer Management Unit section.

PAM

LAFM

BAM

DRCVBC

Comment

Frame accepted

due to PROM = 1

Physical address

match

Logical address

filter match;

frame is not of

type broadcast

Logical address

filter match;

frame can be of

type broadcast

Broadcast frame

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