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AM79C978VC/W 数据表(PDF) 88 Page - Advanced Micro Devices |
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AM79C978VC/W 数据表(HTML) 88 Page - Advanced Micro Devices |
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88 / 261 page ![]() 88 Am79C978 Figure 46. OnNow Functional Diagram Link Change Detect Link change detect is one of wake-up events defined by the OnNow specification. Link Change Detect mode is set when the LCMODE bit (CSR116, bit 8) is set ei- ther by software or loaded through the EEPROM. When this bit is set, any change in the Link status will cause the LCDET bit (CSR116, bit 9) to be set. When the LCDET bit is set, the PME_STATUS bit (PMCSR register, bit 15) will be set. If either the PME_EN bit (PMCSR, bit 8) or the PME_EN_OVR bit (CSR116, bit 10) are set, then the PME will also be asserted. OnNow Pattern Match Mode In the OnNow Pattern Match Mode, the Am79C978 de- vice compares the incoming packets with up to eight patterns stored in the Pattern Match RAM (PMR). The stored patterns can be compared with part or all of in- coming packets, depending on the pattern length and the way the PMR is programmed. When a pattern match has been detected, then PMAT bit (CSR116, bit 7) is set. The setting of the PMAT bit causes the PME_STATUS bit (PMCSR, bit 15) to be set, which in turn will assert the PME pin if the PME_EN bit (PMCSR, bit 8) is set. Pattern Match RAM (PMR) PMR is organized as an array of 64 words by 40 bits as shown in Figure 47. The PMR is programmed indirectly through BCRs 45, 46, and 47. When BCR45 is written and the PMAT_MODE bit (BCR45, bit 7) is set to 1, Pattern Match logic is enabled. No bus accesses into the PMR are possible when the PMAT_MODE bit is set, and BCR46, BCR47, and all other bits in BCR45 are ignored. When PMAT_MODE is set, a read of BCR 45 r e tur n s all bits und efin ed ex ce pt for MPDETECT MPPEN PG MPMODE MPEN Magic Packet Link Change LCMODE Link Change MPMAT LCDET S R Q Q DET CLR BCR47 BCR46 BCR45 S R Q Q SET CLR S R Q Q SET CLR S R Q Q SET CLR PMAT Pattern Match Input Pattern PME_STATUS Pattern Match RAM (PMR) PME Status PME_EN MPMAT PME_EN_OVR LCEVENT PME S R Q Q SET CLR POR POR H_RESET POR POR 22206B-50 |
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