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AM79C978VC/W 数据表(PDF) 259 Page - Advanced Micro Devices |
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AM79C978VC/W 数据表(HTML) 259 Page - Advanced Micro Devices |
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259 / 261 page  Am79C978 9 Physical Layer Devices (Single-Port) 15 Pin Capacitance 221 Pin Descriptions 26 PIN DESIGNATIONS 24 PIN DESIGNATIONS (PQL144 20 PIN DESIGNATIONS (PQL144) 18 PIN DESIGNATIONS (PQR160) 19 listed by Group 22 PMD Interface 225 PMD Interface Timing (PECL) 226 PME 28 Polling 62 Power Good 28, 31 Power Management Event 28 Power Management Support 87 Power on Reset 95 Power Savings Mode 87 Power Supply Current 221, 224 Power Supply Pins 32 PQL144 236 PQR160 237 Preemption During Burst Transaction 48, 50 Preemption During Non-Burst Transaction 48, 50 R RAP Register Address Port 112 RAP Register 111 RDRA and TDRA 199 Receive Address Match 72 Receive Carrier Sense 30 Receive Clock 30 Receive Data 30 Receive Data Valid 30 Receive Descriptor (SWSTYLE = 0) 200 Receive Descriptor (SWSTYLE = 2) 200 Receive Descriptor (SWSTYLE = 3) 200 Receive Descriptor Table Entry 64 Receive Descriptors 200 Receive Exception Conditions 72 Receive FCS Checking 72 Receive Frame Queuing 64 Receive Function Programming 70 Receive Operation 70 Receive Symbol Timing 79 Receive Timing 228, 234 Receive Watermark Programming 138 Register Administration for 10BASE-T PHY De- vice 81 Register Programming Summary 215 Register Summary 207 Re-Initialization 59 RELATED AMD PRODUCTS 15 REQ 27 Reserved Register 10BASE-T Carrier Status Register (Register 23) 197 10BASE-T Configuration Register (Register 22) 197 Reserved Registers HPR8 - HPR15, HPR17 181 Reserved Registers (Registers 8-15, 18, 20-23, and 25-31) 194 Reset 28, 94 Reset Register 96 Reverse Polarity Detect 99 RLEN and TLEN 198 RLL 25 Coding Tree 80 RMD0 200, 201 RMD1 201 RMD2 202 RMD3 203 ROMTNG Programming Values 156 RST 28 Running Registers 102 RWU 29 RX_CLK 30 RX_DV 30 RX_ER 30 RX± 31 S S_RESET 94 Serial Receive Data 31 Serial Transmit Data 31 SERR 28 Setup 2 Setup and Hold Timing 222 Setup Registers 101 Silence Interval (AID symbol 7) 78 Slave Bus Interface Unit 36 Slave Configuration Read 38 Slave Configuration Transfers 36 Slave Configuration Write 38 Slave Cycle Data Parity Error Response 42 Slave Cycle Termination 39 Slave I/O Transfers 37 Slave Read Using I/O Command 38 Slave Write Using Memory Command 39 Soft Reset Function 100 |
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