LSM6DSM datasheet(87/113 Pages) STMICROELECTRONICS

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LSM6DSM

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10.76

WAKE_UP_THS (5Bh)

Single and double-tap function threshold register (r/w).

10.77

WAKE_UP_DUR (5Ch)

Free-fall, wakeup, timestamp and sleep mode functions duration setting register (r/w).

10.78

FREE_FALL (5Dh)

Free-fall function duration setting register (r/w).

Table 186. WAKE_UP_THS register

SINGLE_

DOUBLE_TAP

WK_THS5 WK_THS4 WK_THS3 WK_THS2 WK_THS1 WK_THS0

Table 187. WAKE_UP_THS register description

SINGLE_DOUBLE_TAP

Single/double-tap event enable. Default: 0

(0: only single-tap event enabled;

1: both single and double-tap events enabled)

WK_THS[5:0]

Threshold for wakeup. Default value: 000000

1 LSb corresponds to FS_XL/26

Table 188. WAKE_UP_DUR register

FF_DUR5

WAKE_

DUR1

WAKE_

DUR0

TIMER_

SLEEP_

DUR3

SLEEP_

DUR2

SLEEP_

DUR1

SLEEP_

DUR0

Table 189. WAKE_UP_DUR register description

FF_DUR5

Free fall duration event. Default: 0

For the complete configuration of the free-fall duration, refer to FF_DUR[4:0] in

FREE_FALL (5Dh) configuration.

1 LSB = 1 ODR_time

WAKE_DUR[1:0]

Wake up duration event. Default: 00

1LSB = 1 ODR_time

TIMER_HR

Timestamp register resolution setting(1). Default value: 0

(0: 1LSB = 6.4 ms; 1: 1LSB = 25 μs)

1. Configuration of this bit affects TIMESTAMP0_REG (40h), TIMESTAMP1_REG (41h),

TIMESTAMP2_REG (42h), STEP_TIMESTAMP_L (49h), STEP_TIMESTAMP_H (4Ah), and

STEP_COUNT_DELTA (15h) registers.

SLEEP_DUR[3:0]

Duration to go in sleep mode. Default value: 0000 (this corresponds to 16 ODR)

1 LSB = 512 ODR

Table 190. FREE_FALL register

FF_DUR4 FF_DUR3 FF_DUR2 FF_DUR1 FF_DUR0

FF_THS2

FF_THS1

FF_THS0

Table 191. FREE_FALL register description

FF_DUR[4:0]

Free-fall duration event. Default: 0

For the complete configuration of the free fall duration, refer to FF_DUR5 in

WAKE_UP_DUR (5Ch) configuration

FF_THS[2:0]

Free fall threshold setting. Default: 000

For details refer to Table 192.

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