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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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LSM6DSM 数据表(PDF) 41 Page - STMicroelectronics |
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LSM6DSM 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 113 page  DocID028165 Rev 2 41/113 LSM6DSM Digital interfaces 113 In multiple read/write commands further blocks of 8 clock periods will be added. When the CTRL3_C (12h) (IF_INC) bit is ‘0’, the address used to read/write data remains the same for every block. When the CTRL3_C (12h) (IF_INC) bit is ‘1’, the address used to read/write data is increased at every block. The function and the behavior of SDI and SDO remain unchanged. 6.5.1 SPI read Figure 12. SPI read protocol The SPI Read command is performed with 16 clock pulses. A multiple byte read command is performed by adding blocks of 8 clock pulses to the previous one. bit 0: READ bit. The value is 1. bit 1-7: address AD(6:0). This is the address field of the indexed register. bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb first). bit 16-...: data DO(...-8). Further data in multiple byte reads. Figure 13. Multiple byte SPI read protocol (2-byte example) |
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