ADE7758ARWRL datasheet(61/68 Pages) AD

61 / 68 page

ADE7758

Rev. A | Page 61 of 68

Address

[A6:A0]

Name

R/W1

Length

Default

Value

Description

0x47

VARCFNUM

R/W

Reactive Power CF Scaling Numerator Register. The content of this register is

used in the numerator of the VARCF output scaling. Bits [15:13] indicate reverse

polarity reactive power measurement for Phase A, Phase B, and Phase C in order,

i.e., Bit 15 is Phase A, Bit 14 is Phase B, and so on.

0x48

VARCFDEN

R/W

0x3F

Reactive Power CF Scaling Denominator Register. The content of this register is

used in the denominator of the VARCF output scaling.

0x49 to

0x7D

RESERVED

−

Reserved.

0x7E

CHKSUM

−

Checksum Register. The content of this register represents the sum of all the

ones in the last register read from the SPI port.

0x7F

VERSION

−

Version of the Die.

1 R/W: Read/write capability of the register. R: Read-only register. R/W: Register that can be both read and written.

OPERATIONAL MODE REGISTER (0x13)

The general configuration of the ADE7758 is defined by writing to the OPMODE register. Table 14 summarizes the functionality of each

bit in the OPMODE register.

Table 14. OPMODE Register

Bit

Location

Bit

Mnemonic

Default

Value

Description

DISHPF

The HPFs (high-pass filter) in all current channel inputs are disabled when this bit is set.

DISLPF

The LPFs (low-pass filter) in all current channel inputs are disabled when this bit is set.

DISCF

The frequency outputs APCF and VARCF are disabled when this bit is set.

3 to 5

DISMOD

By setting these bits, ADE7758’s ADCs can be turned off. In normal operation, these bits should be

left at Logic 0.

DISMOD[2:0]

Description

Normal operation.

Redirect the voltage inputs to the signal paths for the current channels

and the current inputs to the signal paths for the voltage channels.

Switch off only the current channel ADCs.

Switch off current channel ADCs and redirect the current input signals

to the voltage channel signal paths.

Switch off only the voltage channel ADCs.

Switch off voltage channel ADCs and redirect the voltage input signals

to the current channel signal paths.

Put the ADE7758 in sleep mode.

Put the ADE7758 in power-down mode.

SWRST

Software Chip Reset. A data transfer to the ADE7758 should not take place for at least 18 µs after a

software reset.

RESERVED

This should be left at 0.

ADE7758ARWRL 数据表(PDF) 61 Page - Analog Devices

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ADE7758ARWRL 数据表(PDF) 61 Page - Analog Devices

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