ADE7758ARWRL datasheet(32/68 Pages) AD

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ADE7758

Rev. A | Page 32 of 68

AWG[11:0]

WDIV[7:0]

DIGITAL

INTEGRATOR

MULTIPLIER

HPF

CURRENT SIGNAL–i(t)

0x2851EC

0x00

0xD7AE14

VOLTAGE SIGNAL–v(t)

0x2852

000x

0xD7AE

LPF2

SIGN

2–1 2–2 2–3 2–4

WATTOS[11:0]

WATTHR[15:0]

TOTAL ACTIVE POWER IS

ACCUMULATED (INTEGRATED) IN

THE ACTIVE ENERGY REGISTER

TIME (nT)

AVERAGE POWER

SIGNAL–P

0xCCCCD

0x00000

Figure 66. ADE7758 Active Energy Accumulation

The ADE7758 achieves the integration of the active power

signal by continuously accumulating the active power signal

in the internal 41-bit energy registers. The watt-hr registers

(AWATTHR, BWATTHR, and CWATTHR) represent the upper

16 bits of these internal registers. This discrete time accumulation

or summation is equivalent to integration in continuous time.

Equation 9 expresses the relationship

()

⎭

⎬

⎫

⎩

⎨

⎧

∑

∫

∞

→

Lim

Energy

(9)

where n is the discrete time sample number and T is the sample

period.

Figure 66 shows a signal path of this energy accumulation. The

average active power signal is continuously added to the internal

active energy register. This addition is a signed operation.

Negative energy is subtracted from the active energy register.

Note the values shown in Figure 65 are the nominal full-scale

values, i.e., the voltage and current inputs at the corresponding

phase are at their full-scale input level. The average active power

is divided by the content of the watt divider register before it is

added to the corresponding watt-hr accumulation registers.

When the value in the WDIV[7:0] register is 0 or 1, active

power is accumulated without division. WDIV is an 8-bit

unsigned register that is useful to lengthen the time it takes

before the watt-hr accumulation registers overflow.

Figure 67 shows the energy accumulation for full-scale signals

(sinusoidal) on the analog inputs. The three displayed curves

show the minimum time it takes for the watt-hr accumulation

responding phase equals to 0x7FF, 0x000, and 0x800. The watt

gain registers are used to carry out a power calibration in the

ADE7758. As shown, the fastest integration time occurs when

the watt gain registers are set to maximum full scale, i.e., 0x7FF.

This is the time it takes before overflow can be scaled by writing

to the WDIV register and therefore can be increased by a

maximum factor of 255.

Note that the active energy register content can roll over to full-

scale negative (0x8000) and continue increasing in value when

the active power is positive (see Figure 66). Conversely, if the

active power is negative, the energy register would under flow

to full-scale positive (0x7FFF) and continue decreasing in value.

By setting the AEHF bit (Bit 0) of the interrupt mask register,

the ADE7758 can be configured to issue an interrupt (IRQ)

when Bit 14 of any one of the three watt-hr accumulation

registers has changed, indicating that the accumulation register

is half full (positive or negative).

Setting the RSTREAD bit (Bit 6) of the LCYMODE register

enables a read-with-reset for the watt-hr accumulation registers,

i.e., the registers are reset to 0 after a read operation.

CONTENTS OF WATTHR

ACCUMULATION REGISTER

0x7FFF

0x3FFF

0x0000

0xC000

0x8000

TIME (Sec)

0.13

0.52

0.79

1.05

1.31

1.58

WATT GAIN = 0x7FF

WATT GAIN = 0000

WATT GAIN = 0800

Figure 67. Energy Register Roll-Over Time for Full-Scale Power

(Minimum and Maximum Power Gain)

ADE7758ARWRL 数据表(PDF) 32 Page - Analog Devices

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