ADE7758ARWRL datasheet(66/68 Pages) AD

66 / 68 page

ADE7758

Rev. A | Page 66 of 68

INTERRUPT STATUS REGISTER (0x19)/RESET INTERRUPT STATUS REGISTER (0x1A)

The interrupt status register is used to determine the source of an interrupt event. When an interrupt event occurs in the ADE7758, the

corresponding flag in the interrupt status register is set logic high. The IRQ pin goes active low if the corresponding bit in the interrupt

mask register is set logic high. When the MCU services the interrupt, it must first carry out a read from the interrupt status register to

determine the source of the interrupt. All the interrupts in the interrupt status register stay at their logic high state after an event occurs.

The state of the interrupt bit in the interrupt status register is reset to its default value once the reset interrupt status register is read.

Table 20. Interrupt Status Register

Bit Location

Interrupt Flag

Default Value

Event Description

AEHF

Indicates that an interrupt was caused by a change in Bit 14 among any one of the

three WATTHR registers, i.e., the WATTHR register is half full.

REHF

Indicates that an interrupt was caused by a change in Bit 14 among any one of the

three VARHR registers, i.e., the VARHR register is half full.

VAEHF

Indicates that an interrupt was caused by a 0-to-1 transition in Bit 15 among any one

of the three VAHR registers, i.e., the VAHR register is half full.

SAGA

Indicates that an interrupt was caused by a SAG on the line voltage of the Phase A.

SAGB

Indicates that an interrupt was caused by a SAG on the line voltage of the Phase B.

SAGC

Indicates that an interrupt was caused by a SAG on the line voltage of the Phase C.

ZXTOA

Indicates that an interrupt was caused by a missing zero crossing on the line voltage

of the Phase A.

ZXTOB

Indicates that an interrupt was caused by a missing zero crossing on the line voltage

of the Phase B.

ZXTOC

Indicates that an interrupt was caused by a missing zero crossing on the line voltage

of the Phase C.

ZXA

Indicates a detection of a rising edge zero crossing in the voltage channel of the Phase A.

ZXB

Indicates a detection of a rising edge zero crossing in the voltage channel of the Phase B.

ZXC

Indicates a detection of a rising edge zero crossing in the voltage channel of the Phase C.

LENERGY

In line energy accumulation, it indicates the end of an integration over an integer

number of half-line cycles (LINECYC), see the Calibration section.

RESET

Indicates that the 5 V power supply is below 4 V. Enables a software reset of the

ADE7758 and sets the registers back to their default values. This bit in the STATUS or

RSTATUS register is logic high for only one clock cycle after a reset event.

PKV

Indicates that an interrupt was caused when the selected voltage input is above the

value in the PKVLVL register.

PKI

Indicates that an interrupt was caused when the selected current input is above the

value in the PKILVL register.

WFSM

Indicates that new data is present in the waveform register.

REVPAP

Indicates that an interrupt was caused by a sign change in the watt calculation among

any one of the phases specified by the TERMSEL bits in the COMPMODE register.

REVPRP

Indicates that an interrupt was caused by a sign change in the VAR calculation among

any one of the phases specified by the TERMSEL bits in the COMPMODE register.

SEQERR

Indicates that an interrupt was caused by a zero crossing from Phase A not followed

by the zero crossing of Phase C but by that of Phase B.

ADE7758ARWRL 数据表(PDF) 66 Page - Analog Devices

ADE7758ARWRL 数据表(HTML) 66 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表下载

链接网址

ADE7758ARWRL 数据表(PDF) 66 Page - Analog Devices

ADE7758ARWRL 数据表(HTML) 66 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表 下载

链接网址

数据表下载