ADE7758ARWRL datasheet(12/68 Pages) AD

12 / 68 page

ADE7758

Rev. A | Page 12 of 68

TERMINOLOGY

Measurement Error

The error associated with the energy measurement made by the

ADE7758 is defined by the following formula

100

–

Energy

True

Energy

True

ADE7758

Registered

Energy

Error

Measuremen

Phase Error between Channels

The high-pass filter and digital integrator introduce a slight

phase mismatch between the current and the voltage channel.

The all-digital design ensures that the phase matching between

the current channels and voltage channels in all three phases is

within ±0.1° over a range of 45 Hz to 65 Hz and ±0.2° over a

range of 40 Hz to 1 kHz. This internal phase mismatch can be

combined with the external phase error (from current sensor or

component tolerance) and calibrated with the phase calibration

registers.

Power Supply Rejection

This quantifies the ADE7758 measurement error as a

percentage of reading when the power supplies are varied. For

the ac PSR measurement, a reading at nominal supplies (5 V) is

taken. A second reading is obtained with the same input signal

levels when an ac signal (175 mV rms/100 Hz) is introduced

onto the supplies. Any error introduced by this ac signal is

expressed as a percentage of reading—see the Measurement

Error definition.

For the dc PSR measurement, a reading at nominal supplies

(5 V) is taken. A second reading is obtained with the same input

signal levels when the power supplies are varied ±5%. Any error

introduced is again expressed as a percentage of the reading.

ADC Offset Error

This refers to the dc offset associated with the analog inputs to

the ADCs. It means that with the analog inputs connected to

AGND the ADCs still see a dc analog input signal. The

magnitude of the offset depends on the gain and input range

selection (see the Typical Performance Characteristics section).

However, when HPFs are switched on, the offset is removed

from the current channels and the power calculation is not

affected by this offset.

Gain Error

The gain error in the ADCs of the ADE7758 is defined as the

difference between the measured ADC output code (minus the

offset) and the ideal output code (see the Current Channel ADC

and Voltage Channel ADC sections). The difference is

expressed as a percentage of the ideal code.

Gain Error Match

The gain error match is defined as the gain error (minus the

offset) obtained when switching between a gain of 1, 2, or 4. It is

expressed as a percentage of the output ADC code obtained

under a gain of 1.

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