ADE7758ARWRL datasheet(31/68 Pages) AD

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ADE7758

Rev. A | Page 31 of 68

Active Power Gain Calibration

Sign of Active Power Calculation

Note that the average active power result from the LPF output

in each phase can be scaled by ±50% by writing to the phase’s

watt gain register (AWG, BWG, or CWG). The watt gain registers

are twos complement, signed registers and have a resolution of

0.024%/LSB. The following equation describes mathematically

the function of the watt gain registers.

Note that the average active power is a signed calculation. If the

phase difference between the current and voltage waveform are

more than 90°, the average power becomes negative. Negative

power indicates that energy is being placed back on the grid.

The ADE7758 has a sign detection circuitry for active power

calculation. The REVPAP bit (Bit 17) in the interrupt status

changes sign. The phases monitored are selected by TERMSEL

bits in the COMPMODE register (see Table 17). The TERMSEL

bits are also used to select which phases are included in the

APCF and VARCF pulse outputs. If the REVPAP bit is set in the

mask register, the IRQ logic output goes active low (see the

ADE7758 Interrupts section). Note that this bit is set whenever

there are sign changes, i.e., the REVPAP bit is set for both a

positive-to-negative change or a negative-to-positive change of

the sign bit. The APCFNUM [15:13] indicate reverse power on

each of the individual phases. Bit 15 will be set if the sign of the

power on Phase A is negative, Bit 14 for Phase B, and Bit 13 for

Phase C.

Output

LPF2

Data

Power

Average

⎟

⎠

⎞

⎜

⎝

⎛ +

Gain

Watt

The output is scaled by −50% when the watt gain registers

contents are set to 0x800 and the output is increased by +50%

by writing 0x7FF to the watt gain register. This register can be

used to calibrate the active power (or energy) calculation in the

ADE7758 for each phase.

Active Power Offset Calibration

The ADE7758 also incorporates a watt offset register on each

phase (AWATTOS, BWATTOS, and CWATTOS). These are

signed twos complement, 12-bit registers that are used to remove

offsets in the active power calculations. An offset may exist in

the power calculation due to crosstalk between channels on the

PCB or in the chip itself. The offset calibration allows the con-

tents of the active power register to be maintained at 0 when no

power is being consumed. One LSB in the active power offset

output. At full-scale input, if the output from the multiplier is

0xCCCCD (838,861d), then 1 LSB in the LPF2 output is

equivalent to 0.0075% of measurement error at −60 dB down of

full scale at current channel. At −60 dB down on full scale (the

input signal level is 1/1000 of full-scale signal inputs), the

average word value from LPF2 is 838.861 (838,861/1,000). One

LSB is equivalent to 1/838.861/16 × 100% = 0.0075% of the

measured value. The active power offset register has a correction

resolution equal to 0.0075% at −60 dB.

No-Load Threshold

The ADE7758 has an internal no-load threshold on each phase.

The no-load threshold can be activated by setting the NOLOAD

bit (Bit 7) of the COMPMODE register. If the active power falls

below 0.005% of full-scale input, the energy is not accumulated

in that phase. As stated, the average multiplier output with full-

scale input is 0xCCCCD. Therefore, if the average multiplier

output falls below 0x2A, the power is not accumulated to avoid

creep in the meter. The no-load threshold is implemented only

on the active energy accumulation. The reactive and apparent

energies do not have the no-load threshold option.

Active Energy Calculation

As stated earlier, power is defined as the rate of energy flow.

This relationship can be expressed mathematically as Equation 7.

dEnergy

Power =

(7)

Conversely, Energy is given as the integral of power.

()dt

Energy

∫

(8)

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