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ST7MC1 数据表(PDF) 147 Page - STMicroelectronics |
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ST7MC1 数据表(HTML) 147 Page - STMicroelectronics |
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147 / 308 page  ST7MC1/ST7MC2 147/308 MOTOR CONTROLLER (Cont’d) Figure 78. Input Stage in Sensorless or Sensor Mode (bits TES[1:0] = 00) VREF Inputn Sel Reg VR[2:0] MCIC MCIA MCIB A B C IS[1:0] CS,H 00 01 10 + - Input Block Input Comparator Block Event Detection DQ CP ZVD bit HDMn bit* to ZH Generation or or or or 1 2 CPBn bit* REO bit CS,H DS,H CPBn bit* V I 12-bit PWM generator Signal U Sampling frequency V0C1 bit Sample CS,H DS,H * = Preload register, changes taken into account at next C event MPHST Register MPOL Register MCRA Register MCRB Register MPOL Register MCRB Register Reg C DS,H Z events: Commutation BEMF Zero-crossing End Of Demagnetization E Emergency Stop Notes: Updated/Shifted on R Ratio Updated (+1 or -1) Multiplier Overflow R+/- O Current Mode Voltage Mode I V Regn Updated with Regn+1 on C 1 2 Branch taken after C event Branch taken after D event MCRC Register MCVREF PZ bit MCRA Register 111 Sample SPLG bit MCRC Register SR bit MCRA Register MCONF Register DS[3:0] bits 2 1 DWF[3:0] MDFR Register ZWF[3:0] MZFR Register SR bit MCRA Register to DH Generation Z Event Generation D Event Generation fSCF 1 |
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