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ST7MC1 数据表(PDF) 36 Page - STMicroelectronics

部件名 ST7MC1
功能描述  8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI
PDF  308 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC1 数据表(HTML) 36 Page - STMicroelectronics

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6.4 MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK AND BEEPER (MCC/RTC)
The Main Clock Controller consists of three differ-
ent functions:
a programmable CPU clock prescaler
a clock-out signal to supply external devices
a real time clock timer with interrupt capability
Each function can be used independently and si-
multaneously.
6.4.1 Programmable CPU Clock Prescaler
The programmable CPU clock prescaler supplies
the clock for the ST7 CPU and its internal periph-
erals. It manages SLOW power saving mode (See
Section 8.2 SLOW MODE for more details).
The prescaler selects the fCPU main clock frequen-
cy and is controlled by three bits in the MCCSR
register: CP[1:0] and SMS.
6.4.2 Clock-out Capability
The clock-out capability is an alternate function of
an I/O port pin that outputs a fOSC2 clock to drive
external devices. It is controlled by the MCO bit in
the MCCSR register.
CAUTION: When selected, the clock out pin sus-
pends the clock during ACTIVE-HALT mode.
6.4.3 Real Time Clock Timer (RTC)
The counter of the real time clock timer allows an
interrupt to be generated based on an accurate
real time clock. Four different time bases depend-
ing directly on fOSC2 are available. The whole
functionality is controlled by four bits of the MCC-
SR register: TB[1:0], OIE and OIF.
When the RTC interrupt is enabled (OIE bit set),
the ST7 enters ACTIVE-HALT mode when the
HALT instruction is executed. See Section 8.4 AC-
TIVE-HALT AND HALT MODES for more details.
6.4.4 Beeper
The beep function is controlled by the MCCBCR
register. It can output three selectable frequencies
on the BEEP pin (I/O port alternate function).
Figure 19. Main Clock Controller (MCC/RTC) Block Diagram
DIV 2, 4, 8, 16
MCC/RTC INTERRUPT
SMS
DIV128
CP0
TB1
TB0
OIE
OIF
CPU CLOCK
MCCSR
RTC
COUNTER
TO CPU AND
PERIPHERALS
fOSC2
fCPU
MCO
MCO
BC1 BC0
MCCBCR
BEEP
GENERATOR
BEEP SIGNAL
TO MOTOR
CONTROL
PERIPHERAL
fMTC
(AND TO MTC
PERIPHERAL)
DIV 2, 4, 8, 16
DIV 2
fCLK
DIV 2
fADC
1



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