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ST7MC1 数据表(PDF) 43 Page - STMicroelectronics |
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ST7MC1 数据表(HTML) 43 Page - STMicroelectronics |
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43 / 308 page  ST7MC1/ST7MC2 43/308 INTERRUPTS (Cont’d) Table 7. Dedicated Interrupt Instruction Set Note: During the execution of an interrupt routine, the HALT, POPCC, RIM, SIM and WFI instructions change the current software priority up to the next IRET instruction or one of the previously mentioned instructions. Table 8. Interrupt Mapping Note 1. Valid for HALT and ACTIVE-HALT modes except for the MCC/RTC or CSS interrupt source which exits from ACTIVE-HALT mode only. Instruction New Description Function/Example I1 H I0 N Z C HALT Entering Halt mode 1 0 IRET Interrupt routine return Pop CC, A, X, PC I1 H I0 N Z C JRM Jump if I1:0=11 (level 3) I1:0=11 ? JRNM Jump if I1:0<>11 I1:0<>11 ? POP CC Pop CC from the Stack Mem => CC I1 H I0 N Z C RIM Enable interrupt (level 0 set) Load 10 in I1:0 of CC 1 0 SIM Disable interrupt (level 3 set) Load 11 in I1:0 of CC 1 1 TRAP Software trap Software NMI 1 1 WFI Wait for interrupt 1 0 N° Source Block Description Register Label Priority Order Exit from HALT1) Address Vector RESET Reset N/A Highest Priority Lowest Priority yes FFFEh-FFFFh TRAP Software interrupt no FFFCh-FFFDh 0MCES Motor Control Emergency Stop or Speed error interrupt MISR MCRC no FFFAh-FFFBh 1 MCC/RTC CSS Main clock controller time base interrupt Safe oscillator activation interrupt MCCSR SICSR yes FFF8h-FFF9h 2 ei0 External interrupt port N/A yes FFF6h-FFF7h 3 ei1 External interrupt port yes FFF4h-FFF5h 4 ei2 External interrupt port yes FFF2h-FFF3h 5 MTC Event U or Current Loop or Sampling Out MISR/MCONF no FFF0h-FFF1h 6 Event R or Event Z MISR no FFEEh-FFEFh 7 Event C or Event D no FFECh-FFEDh 8 SPI SPI peripheral interrupts SPICSR yes FFEAh-FFEBh 9 TIMER A TIMER A peripheral interrupts TASR no FFE8h-FFE9h 10 TIMER B TIMER B peripheral interrupts TBSR no FFE6h-FFE7h 11 LINSCI ™ LINSCI ™ Peripheral interrupts SCISR no FFE4h-FFE5h 12 AVD/ ADC Auxiliary Voltage detector interrupt ADC End of conversion interrupt SICSR ADCSR yes FFE2h-FFE3h 13 PWM ART PWM ART overflow interrupt PWM ART input capture interrupts ARTCSR ARTICCSR no FFE0h-FFE1h 1 |
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