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STLUX 数据表(PDF) 53 Page - STMicroelectronics |
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STLUX 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 126 page  DocID027870 Rev 1 53/126 STLUX Memory and register map 126 8.2.12 System timer registers 8.2.13 Auxiliary timer registers 8.2.14 Digital addressable lighting interface (DALI) Table 26. System timer register map Address Block Register name Register description 0x00.5340 STMR STMR_CR1 Control register 1 0x00.5341 STMR_IER Interrupt enable 0x00.5342 STMR_SR1 Status register 1 0x00.5343 STMR_EGR Event generation 0x00.5344 STMR_CNTH Counter high 0x00.5345 STMR_CNTL Counter low 0x00.5346 STMR_PSCL Prescaler low 0x00.5347 STMR_ARRH Autoreload high 0x00.5348 STMR_ARRL Autoreload low Table 27. Auxiliary timer register map Address Block Register name Register description 0x00.5009 GPIO1 P1_CR2 Control register 2 0x00.5036 MSC MSC_CFGP15 P15 input line control 0x00.5037 MSC_STSP1 Port 1 status 0x00.50C6 CKC CLK_CCODIVR CCO clock dividers 0x00.50C9 CLK_CCOR Configurable clock output Table 28. DALI register map Address Block Register name Register description 0x00.53C0 DALI DALI_CLK_L Data rate control 0x00.53C1 DALI_CLK_H Data rate control 0x00.53C2 DALI_FB0 Forward message 0x00.53C3 DALI_FB1 Forward message 0x00.53C4 DALI_FB2 Forward message 0x00.53C5 DALI_BD Backward message 0x00.53C6 DALI_CR Control 0x00.53C7 DALI_CSR Control and status register 0x00.53C8 DALI_CSR1 Control and status register 1 0x00.53C9 DALI_REVLN Control reverse signal line |
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