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STLUX 数据表(PDF) 20 Page - STMicroelectronics |
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STLUX 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 126 page ![]() Product overview STLUX 20/126 DocID027870 Rev 1 5.2 Internal controller (CPU) The STLUX family integrates a programmable STM8 controller acting as a device supervisor. The STM8 is a modern CISC core and has been designed for code efficiency and performance. It contains 21 internal registers (six of them directly addressable in each execution context), 20 addressing modes including indexed indirect and relative addressing and 80 instructions. 5.2.1 Architecture and registers Harvard architecture with 3-stage pipeline 32-bit wide program memory bus with single cycle fetching for most instructions X and Y 16-bit index registers, enabling indexed addressing modes with or without offset and read-modify-write type data manipulations 8-bit accumulator 24-bit program counter with 16-Mbyte linear memory space 16-bit stack pointer with access to a 64-Kbyte stack 8-bit condition code register with seven condition flags updated with the results of last executed instruction 5.2.2 Addressing 20 addressing modes Indexed indirect addressing mode for lookup tables located in the entire address space Stack pointer relative addressing mode for efficient implementation of local variables and parameter passing 5.2.3 Instruction set 80 instructions with 2-byte average instruction size Standard data movement and logic/arithmetic functions 8-bit by 8-bit multiplication 16-bit by 8-bit and 16-bit by 16-bit division Bit manipulation Data transfer between the stack and accumulator (push/pop) with direct stack access Data transfer using the X and Y registers or direct memory-to-memory transfers 5.2.4 Single wire interface module (SWIM) The single wire interface module (SWIM), together with the integrated debug module (DM), permits non-intrusive, real-time in-circuit debugging and fast memory programming. The interface can be activated in all device operation modes and can be connected to a running device (hot plugging).The maximum data transmission speed is 145 byte/ms. The SWIM pin is a multifunction signal. For further details refer to Table 8: Port P2 I/O multiplexing signal in Section 7.4 on page 39. |
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