STLUX datasheet(55/126 Pages) STMICROELECTRONICS

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STLUX

Memory and register map

126

8.2.17

State machine event driven (SMEDs)

The SMED<n> address register is:

ADD_REG = (5500h + (40h) * n) + offset

where <n> is the SMED instance number 0 - 5.

Table 31. SMED register map

Address (offset)

Block

0x00

SMED<n>

SMD<n>_CTR

Control

0x01

SMD<n>_CTR_TMR

Control time

0x02

SMD<n>_CTR_INP

Control input

0x03

SMD<n>_CTR_DTR

Dithering

0x04

SMD<n>_TMR_T0L

Time T0 LSB

0x05

SMD<n>_TMR_T0H

Time T0 MSB

0x06

SMD<n>_TMR_T1L

Time T1 LSB

0x07

SMD<n>_TMR_T1H

Time T1 MSB

0x08

SMD<n>_TMR_T2L

Time T2 LSB

0x09

SMD<n>_TMR_T2H

Time T2 MSB

0x0A

SMD<n>_TMR_T3L

Time T3 LSB

0x0B

SMD<n>_TMR_T3H

Time T3 MSB

0x0C

SMD<n>_PRM_ID0

IDLE state parameter0

0x0D

SMD<n>_PRM_ID1

IDLE state parameter1

0x0E

SMD<n>_PRM_ID2

IDLE state parameter2

0x0F

SMD<n>_PRM_S00

S0 state parameter0

0x10

SMD<n>_PRM_S01

S0 state parameter1

0x11

SMD<n>_PRM_S02

S0 state parameter2

0x12

SMD<n>_PRM_S10

S1 state parameter0

0x13

SMD<n>_PRM_S11

S1 state parameter1

0x14

SMD<n>_PRM_S12

S1 state parameter2

0x15

SMD<n>_PRM_S20

S2 state parameter0

0x16

SMD<n>_PRM_S21

S2 state parameter1

0x17

SMD<n>_PRM_S22

S2 state parameter2

0x18

SMD<n>_PRM_S30

S3 state parameter0

0x19

SMD<n>_PRM_S31

S3 state parameter1

0x1A

SMD<n>_PRM_S32

S3 state parameter2

0x1B

SMD<n>_CFG

Timer configuration register

0x1C

SMD<n>_DMP_L

Counter dump LSB

0x1D

SMD<n>_DMP_H

Counter dump MSB

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