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S2-LP 数据表(PDF) 81 Page - STMicroelectronics |
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S2-LP 数据表(HTML) 81 Page - STMicroelectronics |
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81 / 90 page  S2-LP Register contents DocID029944 Rev 1 81/90 Name Addr Default Bit Field name Description 6:0 TX_AETHR Set the TX FIFO almost empty threshold. PCKT_FLT_OPTIONS 40 40 7 RESERVED - 6 RX_TIMEOUT_AND_OR_SEL Logical Boolean function applied to CS/SQI/PQI values: 1: OR, 0: AND. 5 RESERVED - 4 SOURCE_ADDR_FLT 1: RX packet accepted if its source field matches with RX_SOURCE_ADDR register 3 DEST_VS_BROADCAST_ADDR 1: RX packet accepted if its source field matches with BROADCAST_ADDR register. 2 DEST_VS_MULTICAST_ADDR 1: RX packet accepted if its destination address matches with MULTICAST_ADDR register. 1 DEST_VS_SOURCE_ADDR 1: RX packet accepted if its destination address matches with RX_SOURCE_ADDR register. 0 CRC_FLT 1: packet discarded if CRC is not valid. PCKT_FLT_GOALS4 41 00 7:0 RX_SOURCE_MASK Mask register for source address filtering. PCKT_FLT_GOALS3 42 00 7:0 RX_SOURCE_ADDR/DUAL_SYNC3 If dual sync mode enabled: dual SYNC word byte 3, Otherwise RX packet source or TX packet destination field. PCKT_FLT_GOALS2 43 00 7:0 BROADCAST_ADDR/DUAL_SYNC2 If dual sync mode enabled: dual SYNC word byte 2, Broadcast address. PCKT_FLT_GOALS1 44 00 7:0 MULTICAST_ADDR/DUAL_SYNC1 If dual sync mode enabled: dual SYNC word byte 1, Multicast address. PCKT_FLT_GOALS0 45 00 7:0 TX_SOURCE_ADDR/DUAL_SYNC0 If dual sync mode enabled: dual SYNC word byte 0, Tx packet source or RX packet destination field. TIMERS5 46 01 7:0 RX_TIMER_CNTR Counter for RX timer. TIMERS4 47 00 7:0 RX_TIMER_PRESC Prescaler for RX timer. TIMERS3 48 01 7:0 LDC_TIMER_PRESC Prescaler for wake up timer. TIMERS2 49 00 7:0 LDC_TIMER_CNTR Counter for wake up timer. TIMERS1 4A 01 7:0 LDC_RELOAD_PRSC Prescaler value for reload operation of wake up timer. TIMERS0 4B 00 7:0 LDC_RELOAD_CNTR Counter value for reload operation of wake up timer. CSMA_CONF3 4C 4C 7:0 BU_CNTR_SEED[14:8] MSB part of the seed for the random generator used to apply the CSMA algorithm. CSMA_CONF2 4D 00 7:0 BU_CNTR_SEED[7:0] LSB part of the seed for the random generator used to apply the CSMA algorithm. CSMA_CONF1 4E 04 7:2 BU_PRSC Prescaler value for the back-off unit BU. 1:0 CCA_PERIOD Multiplier for the Tcca timer. CSMA_CONF0 4F 00 7:4 CCA_LEN The number of time in which the listen operation is performed. 3 RESERVED - 2:0 NBACKOFF_MAX Max number of back-off cycles. IRQ_MASK3 50 00 7:0 INT_MASK[31:24] Enable the routing of the interrupt flag on the configured IRQ GPIO. IRQ_MASK2 51 00 7:0 INT_MASK[23:16] Enable the routing of the interrupt flag on the configured IRQ GPIO. IRQ_MASK1 52 00 7:0 INT_MASK[15:8] Enable the routing of the interrupt flag on the configured IRQ GPIO. IRQ_MASK0 53 00 7:0 INT_MASK[7:0] Enable the routing of the interrupt flag on the configured IRQ GPIO. FAST_RX_TIMER 54 28 7:0 RSSI_SETTLING_LIMIT Sniff timer configuration. PA_POWER8 5A 01 7 RESERVED - |
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