S2-LP datasheet(27/90 Pages) STMICROELECTRONICS

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S2-LP

Block description

DocID029944 Rev 1

27/90

Block description

5.1

Power management

The S2-LP integrates a high efficiency step-down converter cascaded with LDOs meant to

supply both analog and digital parts. However, an LDO directly fed by the external battery

provides a controlled voltage to the data interface block.

S2-

LP’s Power Management (PM) strategy, besides the basic functionality of providing

different blocks with proper supplies, faces two main constraints: the first one is to

implement such a power distribution with maximum efficiency, and the second one is to

guarantee the isolation among critical blocks.

The efficiency target is obtained by using a Switch Mode Power Supply (SMPS) which

converts the battery voltage (1.8 V - 3.6 V) to a lower voltage (settable from 1.1 V to 1.8 V)

with efficiency higher than 90%.

The SMPS output voltage can be controlled by the SET_SMPS_LVL field in the

PM_CONF0 register. The relation between the SET_SMPS_LVL and the VOUT of the SMPS

is given by the following table:

Table 32: SMPS output voltage

SET_SMPS_LVL

SMPS Output Voltage

000b

1.1 V

001b

1.2 V

010b

1.3 V

011b

1.4 V

100b

1.5 V

101b

1.6 V

110b

1.7 V

111b

1.8 V

The SMPS output voltage can be controlled in TX only or for both RX and TX according to

the SMPS_LVL_MODE bit of the PM_CONF1 register.



1: SMPS output level will depend upon the value in PM_CONFIG register just in TX

state, while in RX state it will be fixed to 1.4 V.



0: SMPS output level will depend upon the value written in the PM_CONFIG0 register

(SET_SMPS_LEVEL field) both in RX and TX state.

The SMPS switching frequency is settable by the 2 registers PM_CONF3 and PM_CONF2.

If the KRM_EN is 0, then the digital divider by 4 enabled. In this case SMPS' switching

frequency is:

Equation 1

�� =

��

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