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S2-LP 数据表(PDF) 50 Page - STMicroelectronics

部件名 S2-LP
功能描述  Excellent receiver selectivity and blocking
PDF  90 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

S2-LP 数据表(HTML) 50 Page - STMicroelectronics

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Operating modes
S2-LP
50/90
DocID029944 Rev 1
Command
code
Command name
State for
execution
Description
0x72
FLUSHTXFIFO
All
Clean the TX FIFO
0x73
SEQUENCE_UPDA
TE
ANY
Reload the packet sequence counter
with the value stored in register
6.2
State transaction response time
Table 47: Response time
Initial state
Final state
Response time [µs]
SHUTDOWN
READY
500
READY
STANDBY/ SLEEP
0.3
READY
LOCK with no VCO calibration
65
READY
LOCK with VCO calibration
53
RX/TX
READY
1
STANDBY/SLEEP
READY
32
The transition time enables the S2-LP for frequency hopping operation due to its
reduced response time and very quick programming synthesizer. The response
time depends on frequency of the clock in digital domain, from 24 MHz to 26 MHz.
6.3
Sleep states
S2-LP provides 2 SLEEP states:
SLEEP without FIFO retention (SLEEP_A): in this low power state, the device keeps
all the register values but not the TX and RX FIFOs. This is the device default SLEEP
state.
SLEEP with FIFO retention (SLEEP_B): in this low power state, the device keeps the
content of the registers and the two FIFOs.
The responsibility of the SLEEP type to be used is demanded to the user. To select the
SLEEP mode, the bit SLEEP_MODE_SEL (register 0x79) can be used. If this bit is set to 0,
SLEEP_A will be used each time the device will enter in SLEEP (by SPI command, LDC
flow or CSMA in non-persistent mode). If it is 1, SLEEP_B will be used instead.
The usage of SLEEP_B mode is mandatory in the configuration like CSMA and LDC in Tx.



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