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S2-LP 数据表(PDF) 43 Page - STMicroelectronics

部件名 S2-LP
功能描述  Excellent receiver selectivity and blocking
PDF  90 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

S2-LP 数据表(HTML) 43 Page - STMicroelectronics

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S2-LP
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5.6
Transmitter
The S2-LP contains an integrated PA capable of transmitting at output levels
programmable between -30 dBm to +14 dBm (+16 dBm in boost mode), at step of 0.5 dB.
The PA is single-ended and has a dedicated pin (TXOUT). The PA output is ramped up
and down to prevent unwanted spectral splatter. In TX mode the PA drives the signal
generated by the frequency synthesizer out to the antenna terminal. Delivered power, as
well as harmonic content, depends on the external impedance seen by the PA. It is
possible to program TX to send an unmodulated carrier.
The output stage is supplied from the SMPS through an external choke and is loaded with
a LC-type network which has the function of transforming the impedance of the antenna
and filter out the harmonics. The TX and RX pins are tied directly to share the antenna.
During TX, the LNA inputs are internally shorted to ground to allow for the external network
resonance, so minimizing the power loss due to the RX.
5.6.1
PA configuration
The PA output power level is programmable in 0.5 dB steps. The user can store up to eight
output levels to provide flexible PA power ramp-up and ramp-down at the start and end of a
frequency modulation transmission as well as ASK modulation shaping.
With the digital power-ramping enabled (PA_RAMP_EN = 1 in the PA_POWER0 register)
the ramp starts from the minimum output power programmed and stops at the programmed
maximum value, thus a maximum of 8 steps can be set up as shown in Figure 7. The
interpolation factor ranges from 64 down to 1 depending on the actual data rate. The
assumption is that output power monotonically decrease. Each step is held for a
programmable time interval expressed in terms of bit period units (Tb/8), maximum value is
3 (which means 4×Tb/8=Tb/2). Therefore, the PA ramp may last up to 4 Tb (about 3.3 ms if
the bit rate is 1.2 kbit/s).
The set of eight levels is used to shape the ASK signal. In this case, the modulator works
as a counter that counts when transmitting a one and down when transmitting a zero. The
counter counts at a rate equal to 8 times the symbol rate (in this case, the step width is
fixed by symbol rate).
For OOK modulation, the signal is abruptly switched between two levels only: no power
and maximum. This mode is obtained setting the PA_RAMP_EN=0.
With the digital power-ramping, the digital PA interpolation can be enabled through the
PA_INTERP_EN field of the MOD1 register.
When this feature is enabled, the power values specified in the PA_POWER registers are
linearly interpolated by the modulator before being applied to the PA.
The mathematical interpolation factor applied at each output sample is 64 for data rates
corresponding to DATA_RATE_E < 5, it is then automatically scaled as
64
2����������������_����������������_����−5
and it
is automatically disabled for DATA_RATE_E = 11.



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