STA321MPL1 datasheet(70/80 Pages) STMICROELECTRONICS

部件名	STA321MPL1

功能描述	Scalable digital microphone processor

PDF	80 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

70 / 80 page

Configuration registers (0x77; 0x78; 0x79)

STA321MPL1

70/80

DocID029389 Rev 1

6.5.10

Clock manager configuration

PLL configuration registers (0x71, 0x72, 0x73, 0x74)

PLL multiplication factor (fractional part, H) (0x71)

PLL multiplication factor (fractional part, L) (0x72)

PLL multiplication factor (integral part) named as N Division Factor (NDIV)

and dithering (0x73)

PLLFI[15:8]

000

PLLFI[7:0]

000

PLLDD[1:0]

PLLND[5:0]

000

Bit

RST

Name

Description

PLLDD1

PLL dithering:

00: PLL clock dithering disabled

01: PLL clock dithering enabled (triangular)

10: PLLclock dithering enabled (rectangular)

11: reserved

PLLDD0

PLLND5

N (loop) Division Factor

This factor should be:

PLLND4

PLLND3

PLLND2

PLLND1

PLLND0

≤ DIV 55

≤

STA321MPL1 数据表(PDF) 70 Page - STMicroelectronics

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