STA321MPL1 datasheet(38/80 Pages) STMICROELECTRONICS

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Registers

STA321MPL1

38/80

DocID029389 Rev 1

5.2.28

Channel input mapping channels 1 and 2 (0x1B)

5.2.29

Channel input mapping channels 3 and 4 (0x1C)

5.2.30

Channel input mapping channels 5 and 6 (0x1D)

5.2.31

Channel input mapping channels 7 and 8 (0x1E)

Each channel received via the I²S can be mapped to any internal processing channel via the

channel input mapping registers. This allows for flexibility in processing, simplifies output

stage designs, and enables the ability to perform crossovers. The default settings of these

registers map each I²S input channel to its corresponding processing channel.

CnVT[4:0]

Volume

0x00 to 0x06

10 dB

0x07

9 dB

……

0x0F

1 dB

0x10

0 dB

0x11

-1 dB

……

0x19

-9 dB

0x1A to 0x1F

-10 dB

C2IM2

C2IM1

C2IM0

C1IM2

C1IM1

C1IM0

C4IM2

C4IM1

C4IM0

C3IM2

C3IM1

C3IM0

C6IM2

C6IM1

C6IM0

C5IM2

C5IM1

C5IM0

C8IM2

C8M1

C8IM0

C7IM2

C7IM1

C7IM0

STA321MPL1 数据表(PDF) 38 Page - STMicroelectronics

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