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STA321MPL1 数据表(PDF) 10 Page - STMicroelectronics |
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STA321MPL1 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 80 page  Device overview STA321MPL1 10/80 DocID029389 Rev 1 55 3.3-V capable TTL 2 mA output buffer BICKO Output serial clock 56 LRCKO Output left/right clock 57 SDO_12 Output serial data channels 1 and 2 58 SDO_34 Output serial data channels 3 and 4 62 SDO_56 Output serial data channels 5 and 6 63 SDO_78 Output serial data channels 7 and 8 64 5-V tolerant TTL Schmitt trigger input buffer PWDN Device power-down 3, 12, 24, 28, 35, 44, 52, 59 3.3-V digital supply voltage VDD 3.3-V supply 2, 4, 13, 27, 36, 45, 53, 60 Digital ground GND Ground 14, 21, 22, 26, 37, 46, 54, 61 NC Not connected Table 2. Pin description (continued) Pin number Type Name Description |
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