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STA321MPL1 数据表(PDF) 21 Page - STMicroelectronics |
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STA321MPL1 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 80 page  DocID029389 Rev 1 21/80 STA321MPL1 Registers 80 Input mapping 0x1B C12im C2IM2 C2IM1 C2IM0 C1IM2 C1IM1 C1IM0 0x1C C34im C4IM2 C4IM1 C4IM0 C3IM2 C3IM1 C3IM0 0x1D C56im C6IM2 C6IM1 C6IM0 C5IM2 C5IM1 C5IM0 0x1E C78im C8IM2 C8IM1 C8IM0 C7IM2 C7IM1 C7IM0 Processing loop 0x28 BQlp C8BLP C7BLP C6BLP C5BLP C4BLP C3BLP C2BLP C1BLP 0x29 MXlp C8MXLP C7MXLP C6MXLP C5MXLP C4MXLP C3MXLP C2MXLP C1MXLP Processing bypass 0x2A EQbp C8EQBP C7EQBP C6EQBP C5EQB C4EQBP C3EQBP C2EQBP C1EQBP 0x2B ToneBP C8TCB C7TCB C6TCB C5TCB C4TCB C3TCB C2TCB C1TCB Tone control 0x2C Tone TTC3 TTC2 TTC1 TTC0 BTC3 BTC2 BTC1 BTC0 Dynamics control 0x2D C1234ls C4LS1 C4LS0 C3LS1 C3LS0 C2LS1 C2LS0 C1LS1 C1LS0 0x2E C5678ls C8LS1 C8LS0 C7LS1 C7LS0 C6LS1 C6LS0 C5LS1 C5LS0 0x2F L1ar L1A3 L1A2 L1A1 L1A0 L1R3 L1R2 L1R1 L1R0 0x30 L1atrt L1AT3 L1AT2 L1AT1 L1AT0 L1RT3 L1RT2 L1RT1 L1RT0 0x31 L2ar L2A3 L2A2 L2A1 L2A0 L2R3 L2R2 L2R1 L2R0 0x32 L2atrt L2AT3 L2AT2 L2AT1 L2AT0 L2RT3 L2RT2 L2RT1 L2RT0 PWM output timing 0x33 C12ot C2OT2 C2OT1 C2OT0 C1OT2 C1OT1 C1OT0 0x34 C34ot C4OT2 C4OT1 C4OT0 C3OT2 C3OT1 C3OT0 0x35 C56ot C6OT2 C6OT1 C6OT0 C5OT2 C5OT1 C5OT0 0x36 C78ot C8OT2 C8OT1 C8OT0 C7OT2 C7OT1 C7OT0 I²S output channel mapping 0x37 C12om C2OM2 C2OM1 C2OM0 C1OM2 C1OM1 C1OM0 0x38 C34om C4OM2 C4OM1 C4OM0 C3OM2 C3OM1 C3OM0 0x39 C56om C6OM2 C6OM1 C6OM0 C5OM2 C5OM1 C5OM0 0x3A C78om C8OM2 C8OM1 C8OM0 C7OM2 C7OM1 C7OM0 Table 9. Register summary (continued) Addr Name D7 D6 D5 D4 D3 D2 D1 D0 |
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