EPC635 datasheet(64/97 Pages) EPC

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7.10. External modulation MODCLK

The epc635 has for enhanced user applications also the possibility to bring an external modulation clock to the chip. The optional MOD-

CLK input can be used for this to inject in parallel a user controlled/modulated clock for both the LED driver and the pixel demodulator, see

Figure 59.

Memory

Controller

Registers

Phase

Detector

m+n

Clock Delay

Pixel

Cont.

Seq.

Memory

I2C Slave

TCMI

160x60

Pixel Field

SCL

SDA

VDD

VDDIO

XTALOUT

XTALIN_CLKIN

PLL

CGU

ADC Read-Out

Charge

Pump

13V

EEPROM

LED Driver

LED (open-drain)

Modulator

LEDFB

De-

modulator

DATA[11:0]

DCLK

Temp.

Sensor

VSSLED

VSYNC_PSDIAG_A0

VSSIO

ROW Buffer

VDDPXH

epc635

OSC

VBS

VDDA

VSSA

SHUTTER

JTAG

HSYNC_A1

XSYNC_SAT_CFG

RGU

DLL

LED2 (push-pull)

Figure 59: The MODCLK signal flow (red marked)

The external MODCLK can be used e.g. in concepts for reliable multi camera applications. It allows to use e.g. frequency-division multiple

access (FDMA). In corresponding literature, the details of these concepts are explained in detail.

The user is free to apply any digital waveform up to 80MHz during frame acquisition as external MODCLK signal. Even more, he is also

free to use modulations like pseudo-random edge jitter, dithering, etc.

The signal from the MODCLK pin is used as far in the register CLK_enables is set to mod_clk_sel = 1, see section 8.7.1.

IMPORTANT:

■ The external modulation clock replaces the internal generated modulation clock, refer also to Table 33. Based on this clock, the modula-

tor generates the modulation sequence according chapter 6., Measurement Modes and the setting in the MOD_Control register.

■ Set DLL_measurement_rate = 0 for switching off the automatic DLL synchronization.

Characteristics subject to change without notice

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