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EPC635 数据表(PDF) 10 Page - Espros Photonics corp |
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EPC635 数据表(HTML) 10 Page - Espros Photonics corp |
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10 / 97 page ![]() 2.2. Pin list Pin No. Pin name Supply class VSC Pin type Rst func Rst level Description IO pins 4 DATA0 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-0 (LSB) / Strap 0: reserved 5 DATA1 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-1 / Strap 1: reserved 7 DATA2 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-2 / Strap 2: reserved 8 DATA3 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-3 / Strap 3: reserved 10 DATA4 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-4 / Strap 4: reserved 11 DATA5 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-5 / Strap 5: reserved 12 DATA6 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-6 / Strap 6: reserved 13 DATA7 VDDIO DIO IPD 1 VOL TCMI high-speed output bit-7 / Strap 7: reserved 1 DCLK VDDIO DIO IPD 1 VOL TCMI Data Clock output / Strap 12: reserved 34 VSYNC_A0 VDDIO DIO IPD 1 VOH TCMI Vsync output / Strap input: I2C device address bit A0 35 HSYNC_A1 VDDIO DIO IPD 1 VOH TCMI Hsync output / Strap input: I2C device address bit A1 3 XSYNC_SAT_CFG VDDIO DIO IPD 1 VOL TCMI Xsync output / TCMI Saturation flag output / Strap 15: reserved 18 SCL VDDIO DIOD I VIH I2C clock input 5 19 SDA VDDIO DIOD I VIH I2C data input/output 5 29 SHUTTER VDDIO DI PD VIL Shutter release input 28 RESET VDDIO DI PD VIL Reset input (active low), 600kΩ int. pull-down 4 2 MODCLK VDDIO DI PD Modulator/demodulator external clock input. If not used, connection to a test pad suggested. 27 LED2 VDDIO DO LED driver push-pull output 3 14 TDO VDDIO DO VOL JTAG test data output. Do not any electrical con- nection except to a test pad (suggested). 15 TDI VDDIO DI PU VIH JTAG test data input. Do not any electrical con- nection except to a test pad (suggested). 16 TCK VDDIO DI PD VIL JTAG test clock input. Do not any electrical con- nection except to a test pad (suggested). 17 TMS VDDIO DI PU VIH JTAG test mode select input. Do not any electri- cal connection except to a test pad (suggested). Digital pins 30 XTALIN_CLKIN VDDPLL AI OSC input from external XTAL or Resonator / CLKIN from external clock source 31 XTALOUT VDDPLL AO OSC output (buffered) to ext. XTAL or Resonator Table 8: Pin list © 2017 ESPROS Photonics Corporation Characteristics subject to change without notice 10 / 97 Datasheet_epc635-V1.02 www.espros.com |
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