NET2890 datasheet(2/73 Pages) ETC

2 / 73 page

Specification

NET2890 USB Interface Controller

____________________________________________________________________________________

NetChip Technology, Inc., 1999

335 Pioneer Way, Mountain View, California 94041

TEL (650) 526-1490

FAX (650) 526-1494

http://www.netchip.com

Rev 2.0, Draft 9, July 16, 1999

This document contains material that is confidential to NetChip. Reproduction without the express written

consent of NetChip is prohibited. All reasonable attempts were made to ensure the contents of this

document are accurate, however no liability, expressed or implied is guaranteed. NetChip reserves the right

to modify this document, without notification, at any time.

Revision History

Revision

Issue Date

Comments

1.0 Draft 1

June 30, 1997

Initial Spec. Based on NET2888 Rev 2 Draft 3

1.0 Draft 2

July 24, 1997

Modified register architecture

1.0 Draft 3

October 4, 1997

More Register Modifications

1.0 Draft 4

October 6, 1997

More Register Modifications (MAINCTL, IRQSTAT1,

IRQSTAT3, IRQENB1, IRQENB3, FIFOSTAT, FIFOINTENB

1.0 Draft 5

November 19, 1997

Clarify some register descriptions

2.0 Draft 1

January 17, 1998

Initial Specification for NET2890 Revision 2.

2.0 Draft 2

February 13, 1998

Update some registers

2.0 Draft 3

March 2, 1998

Update some registers; Change ‘mapped’ to ‘paged’ register

nomenclature

2.0 Draft 4

March 12, 1998

Added some new register bits. Clarified sections of

documentation.

2.0 Draft 5

March 23, 1998

Finalize changes to Revision 2.

2.0 Draft 6

April 3, 1998

Clarify some sections.

2.0 Draft 7

Aug 24, 1998

Clarify FIFO Valid and FIFO processing

2.0 Draft 8

Feb 21, 1999

Update AC timing, and DC specifications

2.0 Draft 9

July 16, 1999

Update Endpoint Maximum Packet Length defaults, I/O timing.

Change output resistance in 7.4.1

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