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NET2890 数据表(PDF) 51 Page - List of Unclassifed Manufacturers

部件名 NET2890
功能描述  USB Interface Controller
PDF  73 Pages
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制造商  ETC [List of Unclassifed Manufacturers]
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标志 ETC - List of Unclassifed Manufacturers

NET2890 数据表(HTML) 51 Page - List of Unclassifed Manufacturers

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Specification
NET2890 USB Interface Controller
____________________________________________________________________________________
NetChip Technology, Inc., 1999
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 2.0, Draft 9, July 16, 1999
51
5.6.4 (Index 03h; IRQENB2) Interrupt Enable Register 2
Bits
Description
Read
Write
Default
Value
7
Control Status Interrupt Enable. When set, this bit enables a local interrupt to be
generated when an IN or OUT token indicating Control Status has been received.
Yes
Yes
0
6
Setup Packet Interrupt Enable. When set, this bit enables a local interrupt to be
generated when a setup packet has been received from the host.
Yes
Yes
0
5
Input Pin Change Interrupt Enable. When set, this bit enables a local interrupt to
be generated when a change has been detected on either the BUSPWR# or
PWRGOOD# pins.
Yes
Yes
0
4
Reserved.
Yes
No
0
3
EOT Interrupt Enable. When set, this bit enables a local interrupt to be generated
when an EOT# signal is received from the DMA controller.
Yes
Yes
0
2
Root Port Reset Interrupt Enable. When set, this bit enables a local interrupt to be
generated when a root port reset is detected.
Yes
Yes
0
1
Suspend Request Interrupt Enable. When set, this bit enables a local interrupt to
be generated when the USB host is requesting the NET2890 to enter suspend mode.
Yes
Yes
0
0
Resume Interrupt Enable. When set, this bit enables a local interrupt to be
generated when a device resume has been detected.
Yes
Yes
0
5.6.5 (Index 07h; FRAMELSB) Frame Counter (LSB)
Bits
Description
Read
Write
Default
Value
7:0
Frame Counter LSB. This field contains the least-significant bits of the frame
counter from the most recent start-of-frame packet.
Yes
No
0
5.6.6 (Index 08h; FRAMEMSB) Frame Counter (MSB)
Bits
Description
Read
Write
Default
Value
7:4
Reserved.
Yes
No
0
3
Fast Times. When this bit is set, the frame counter operates at a fast speed for testing
purposes only.
Yes
Yes
0
2:0
Frame Counter MSB. This field contains the most-significant bits of the frame
counter from the most recent start-of-frame packet.
Yes
No
0



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