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RA4M1 数据表(PDF) 63 Page - Renesas Technology Corp |
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RA4M1 数据表(HTML) 63 Page - Renesas Technology Corp |
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63 / 130 page ![]() R01DS0355EJ0100 Rev.1.00 Page 63 of 130 Oct 8, 2019 RA4M1 Group 2. Electrical Characteristics Note 1. The division ratio of ICK, FCK, and PCKx is the minimum division ratio within the allowable frequency range. The recovery time is determined by the system clock source. Note 2. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h. Note 3. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h. Note 1. The division ratio of ICK, FCK, and PCKx is the minimum division ratio within the allowable frequency range. The recovery time is determined by the system clock source. When multiple oscillators are active, the recovery time can be determined by the following expression. Note 2. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 05h. Note 3. The Main Clock Oscillator Wait Control Register (MOSCWTCR) is set to 00h. Note 1. The sub-clock oscillator or LOCO itself continues to oscillate in Software Standby mode during Subosc-speed mode. Table 2.26 Timing of recovery from low power modes (3) Parameter Symbol Min Typ Max Unit Test conditions Recovery time from Software Standby mode*1 Low-speed mode Crystal resonator connected to main clock oscillator System clock source is main clock oscillator (1 MHz)*2 tSBYMC -2 3 ms Figure 2.34 External clock input to main clock oscillator System clock source is main clock oscillator (1 MHz)*3 tSBYEX -28 50 μs System clock source is MOCO tSBYMO -25 35 μs Table 2.27 Timing of recovery from low power modes (4) Parameter Symbol Min Typ Max Unit Test conditions Recovery time from Software Standby mode*1 Low-voltage mode Crystal resonator connected to main clock oscillator System clock source is main clock oscillator (4 MHz)*2 tSBYMC -2 3 ms Figure 2.34 External clock input to main clock oscillator System clock source is main clock oscillator (4 MHz)*3 tSBYEX - 108 130 μs System clock source is HOCO tSBYHO - 108 130 μs Table 2.28 Timing of recovery from low power modes (5) Parameter Symbol Min Typ Max Unit Test conditions Recovery time from Software Standby mode*1 Subosc-speed mode System clock source is sub-clock oscillator (32.768 kHz) tSBYSC -0.85 1 ms Figure 2.34 System clock source is LOCO (32.768 kHz) tSBYLO - 0.85 1.2 ms |
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