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RA4M1 数据表(PDF) 2 Page - Renesas Technology Corp

部件名 RA4M1
功能描述  High efficiency 48-MHz Arm Cortex-M4 core, 256-KB code flash memory
PDF  130 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

RA4M1 数据表(HTML) 2 Page - Renesas Technology Corp

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R01DS0355EJ0100 Rev.1.00
Page 2 of 130
Oct 8, 2019
Features
■ Arm Cortex-M4 Core with Floating Point Unit (FPU)
 Armv7E-M architecture with DSP instruction set
 Maximum operating frequency: 48 MHz
 Support for 4-GB address space
 Arm Memory Protection Unit (Arm MPU) with 8 regions
 Debug and Trace: ITM, DWT, FPB, TPIU, ETB
 CoreSight™ Debug Port: JTAG-DP and SW-DP
■ Memory
 256-KB code flash memory
 8-KB data flash memory (100,000 program/erase (P/E) cycles)
 32-KB SRAM
 Flash Cache (FCACHE)
 Memory Protection Unit (MPU)
 128-bit unique ID
■ Connectivity
 USB 2.0 Full-Speed Module (USBFS)
- On-chip transceiver with voltage regulator
- Compliant with USB Battery Charging Specification 1.2
 Serial Communications Interface (SCI) × 4
- UART
- Simple IIC
- Simple SPI
 Serial Peripheral Interface (SPI) × 2
 I2C bus interface (IIC) × 2
 Controller Area Network (CAN) module
 Serial Sound Interface Enhanced (SSIE)
■ Analog
 14-bit A/D Converter (ADC14)
 12-bit D/A Converter (DAC12)
 8-bit D/A Converter (DAC8) ×2 (for ACMPLP)
 Low-Power Analog Comparator (ACMPLP) × 2
 Operational Amplifier (OPAMP) × 4
 Temperature Sensor (TSN)
■ Timers
 General PWM Timer 32-Bit (GPT32) × 2
 General PWM Timer 16-Bit (GPT16) × 6
 Asynchronous General-Purpose Timer (AGT) × 2
 Watchdog Timer (WDT)
■ Safety
 Error Correction Code (ECC) in SRAM
 SRAM parity error check
 Flash area protection
 ADC self-diagnosis function
 Clock Frequency Accuracy Measurement Circuit (CAC)
 Cyclic Redundancy Check (CRC) calculator
 Data Operation Circuit (DOC)
 Port Output Enable for GPT (POEG)
 Independent Watchdog Timer (IWDT)
 GPIO readback level detection
 Register write protection
 Main oscillator stop detection
 Illegal memory access
■ System and Power Management
 Low power modes
 Realtime Clock (RTC) with calendar and Battery Backup support
 Event Link Controller (ELC)
 DMA Controller (DMAC) × 4
 Data Transfer Controller (DTC)
 Key Interrupt Function (KINT)
 Power-on reset
 Low Voltage Detection (LVD) with voltage settings
■ Security and Encryption
 AES128/256
 GHASH
 True Random Number Generator (TRNG)
■ Human Machine Interface (HMI)
 Segment LCD Controller (SLCDC)
- Up to 38 segments × 4 commons
- Up to 34 segments × 8 commons
 Capacitive Touch Sensing Unit (CTSU)
■ Multiple Clock Sources
 Main clock oscillator (MOSC)
(1 to 20 MHz when VCC = 2.4 to 5.5 V)
(1 to 8 MHz when VCC = 1.8 to 2.4 V)
(1 to 4 MHz when VCC = 1.6 to 1.8 V)
 Sub-clock oscillator (SOSC) (32.768 kHz)
 High-speed on-chip oscillator (HOCO)
(24, 32, 48, 64 MHz when VCC = 2.4 to 5.5 V)
(24, 32, 48 MHz when VCC = 1.8 to 5.5 V)
(24, 32 MHz when VCC = 1.6 to 5.5 V)
 Middle-speed on-chip oscillator (MOCO) (8 MHz)
 Low-speed on-chip oscillator (LOCO) (32.768 kHz)
 IWDT-dedicated on-chip oscillator (15 kHz)
 Clock trim function for HOCO/MOCO/LOCO
 Clock out support
■ General Purpose I/O Ports
 Up to 84 input/output pins
- Up to 3 CMOS input
- Up to 81 CMOS input/output
- Up to 9 input/output 5-V tolerant
- Up to 2 high current (20 mA)
■ Operating Voltage
 VCC: 1.6 to 5.5 V
■ Operating Temperature and Packages
 Ta = -40°C to +85°C
- 100-pin LGA (7 mm × 7 mm, 0.65 mm pitch)
 Ta = -40°C to +105°C
- 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)
- 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)
- 64-pin QFN (8 mm × 8 mm, 0.4 mm pitch)
- 48-pin LQFP (7 mm × 7 mm, 0.5 mm pitch)
- 48-pin QFN (7 mm × 7 mm, 0.5 mm pitch)
- 40-pin QFN (6 mm × 6 mm, 0.5 mm pitch)
High efficiency 48-MHz Arm® Cortex®-M4 core, 256-KB code flash memory, 32-KB SRAM, Segment LCD Controller,
Capacitive Touch Sensing Unit, USB 2.0 Full-Speed Module, 14-bit A/D Converter, 12-bit D/A Converter, security and
safety features
RA4M1 Group
Datasheet
Features



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