ADA4254ACPZ-R7 datasheet(27/59 Pages) AD

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Data Sheet

ADA4254

Rev. B | Page 27 of 59

OUTPUT RIPPLE CALIBRATION CONFIGURATION

The amplifiers inside the ADA4254 achieve zero drift by using

a technique commonly referred to as chopping. When chopping is

used to null the offset of an amplifier, the unchopped offsets are

modulated to the frequency at which the chopping is performed.

All chopping amplifiers feature this phenomenon, which is

commonly referred to as ripple.

The ADA4254 instrumentation amplifier features a proprietary

calibration routine that reduces the residual voltage ripple at

the output of the ADA4254 by nulling the internal offsets of all

amplifiers. This calibration occurs automatically when the

ADA4254 is initially powered on, after a POR_HV event, or

after a soft reset occurs. Further calibrations can be performed

either on a scheduled or triggered basis.

While the ADA4254 is calibrating, SW_A1, SW_A2, SW_B1,

and SW_B2 are temporarily opened and the amplifier inputs are

internally connected to AVSS through SW_C1 and SW_C2. After

a calibration completes, the switches return to their previous states.

Two calibration types can be selected via CAL_SEL: full calibration

or quick calibration.

A full calibration sequentially calibrates each individual amplifier

and fully computes a new calibration code. This calibration

takes approximately 85 ms. Full calibration always occurs after

power-up, after a POR_HV event, or after a soft reset.

A quick calibration calculates a new calibration code for all

amplifiers at the same time. The calibration code of each

amplifier is then adjusted by an incremental amount. This type

of calibration takes approximately 8 ms.

By default, calibrations only occur after power-up, after a POR_HV

event, or after a reset. Additional scheduled calibrations are con-

figured via CAL_EN, or are triggered via the TRIG_CAL bit.

When scheduled calibrations are configured via CAL_EN, the

selected calibration type occurs at the rate configured via CAL_EN.

Calibrations can also be manually triggered via TRIG_CAL.

The internal offsets, which are nulled by the ADA4254

calibration routine, can change when the circuit or the

environmental conditions change. Changes in temperature,

supply voltage, common-mode input voltage, time, and so on,

can all cause an increase in output ripple. Recalibrations, either

triggered or scheduled, renull internal offsets and reduce

residual output ripple.

During a calibration, noise can limit the ability of the ADA4254

to fully null internal offsets and fully reduce the residual output

ripple. Proper decoupling and shielding techniques help ensure

accurate calibrations. Avoid large input transients during

calibrations. Calibrations typically reduce the output ripple to

<200 μV rms, but results as high as 5 mV rms can be observed

in the presence of noise or input transients. If excessive residual

ripple is detected, subsequent calibrations can be performed to

reduce the output ripple.

ADC synchronization and simple filtering, either passive or

active, are also effective methods in reducing residual output

ripple. These techniques are discussed in detail in the External

Clock Synchronization section and the Output Amplifier section.

GENERAL-PURPOSE INPUTS/OUTPUTS (GPIOs)

The ADA4254 features several multifunction GPIOs. There are

five GPIOs on the TSSOP and seven on the LFCSP package. These

GPIOs can be configured to either read a logic input or output a

logic signal. A GPIO pin is configured as an input or an output

using the GPIO_DIR register. The bit position in the GPIO_DIR

bit at Position 0 controls the GPIO0 direction.

The GPIO_DATA register sets the GPIO output when a GPIO

is configured as an output. The GPIO_DATA register also

reads the data at the GPIO pin when a GPIO is configured as an

input. The bit field position in the GPIO_DATA register

corresponds to the GPIO pin number. For example, the bit at

Position 0 corresponds to GPIO0.

The ADA4254 GPIOs can be configured to perform additional

special functions.

Each GPIO can be configured as an output to extend the chip

select signal from the SPI master to other slave devices. This

special functionality is referred to as sequential chip select.

This special functionality is controlled by the SCS register.

GPIO0 and GPIO1 can also be configured as external multiplexer

control signals. This function is enabled in the special function

outputs, the EXT_MUX bit field in the GAIN_MUX register

controls the state of GPIO0 and GPIO1, allowing the gain and the

external mux setting to be modified with one write operation.

GPIO2 can be configured to output a calibration busy signal.

This function is enabled via CAL_BUSY_OUT. The calibration

busy signal indicates that the ADA4254 is performing a

calibration routine. GPIO2 must be configured as an output to

use this special function.

GPIO3 can be configured to output a fault interrupt signal.

This signal is an OR function of all the analog and digital error

indicators found in the ANALOG_ERR and DIGITAL_ERR

registers. This function is enabled via FAULT_INT_OUT.

GPIO3 must be configured as an output to use this special

function.

When configured as an output, GPIO4 can be configured to

output the 1 MHz master clock or the 125 kHz chopping clock.

This is configured via INT_CLK_OUT and CLK_OUT_SEL.

When configured as an input, GPIO4 can also accept an

external clock. This function is configured via EXT_CLK_IN.

EXCITATION CURRENTS

The ADA4254 contains two software configurable excitation

current sources, IOUT_LV and IOUT_HV. These current sources

can be used to excite external circuitry, such as resistive bridges or

RTD sensors. IOUT_LV is sourced from AVDD and IOUT_HV is

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