ADA4254ACPZ-R7 datasheet(9/59 Pages) AD

9 / 59 page

Data Sheet

ADA4254

Rev. B | Page 9 of 59

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

VDDH

VSSH – 0.3 V to VSSH + 60 V

AVDD

AVSS – 0.3 V to AVSS + 5.5 V

DVDD

DVSS – 0.3 V to DVSS + 5.5 V

AVSS or DVSS

VSSH – 0.3 V to VSSH + 30 V

Voltage

VDDH – 30 V to VDDH + 0.3 V

Current

±10 mA

Input Voltage (+IN1, −IN1, +IN2,

or −IN2)

VSSH − 60 V to VSSH + 60 V

Differential Input Voltage

Between Any Two Amplifier

Inputs (+IN1, −IN1, +IN2, or

−IN2)

60 V

−OUT, +OUT Short-Circuit

Current

Indefinite

VOCM

Voltage

AVSS – 0.3 V to AVDD + 0.3 V

Current

±10 mA

Digital Inputs/Outputs (SPI and

GPIO), Voltage

DVSS – 0.3 V to DVDD + 0.3 V

Digital Inputs (SPI and GPIO),

Current

±10 mA

IOUT_LV

Voltage

AVSS – 0.3 V to AVDD + 0.3 V

Current

±10 mA

IOUT_HV

Voltage

VSSH – 0.3 V to VDDH + 0.3 V

Current

±10 mA

Operating Temperature Range

−40°C to +125°C

Specified Temperature Range

−40°C to +105°C

Maximum Junction Temperature

+150°C

Storage Temperature Range

−65°C to +150°C

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the product. This is a stress rating

only; functional operation of the product at these or any other

conditions above those indicated in the operational section of this

specification is not implied. Operation beyond the maximum

operating conditions for extended periods may affect product

reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Careful attention to

PCB thermal design is required.

θJA is the natural convection, junction to ambient, thermal

resistance measured in a one cubic foot sealed enclosure. θJC

is the junction to case thermal resistance.

Table 4. Thermal Resistance

Package Type1

θJA

θJC

Unit

CP-28-10

36.9

1.9

°C/W

RU-24

64.8

14.11

°C/W

1 The thermal resistance values specified in Table 4 are simulated based on

JEDEC specifications (unless specified otherwise) and must be used in

compliance with JESD51-12.

Refer to the ESD Map section for a schematic of ESD diodes

and paths.

ESD CAUTION

ADA4254ACPZ-R7 数据表(PDF) 9 Page - Analog Devices

ADA4254ACPZ-R7 数据表(HTML) 9 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

数据表下载

链接网址

ADA4254ACPZ-R7 数据表(PDF) 9 Page - Analog Devices

ADA4254ACPZ-R7 数据表(HTML) 9 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

数据表 下载

链接网址

数据表下载