ST7LUS5 datasheet(104/124 Pages) STMICROELECTRONICS

104 / 124 page

Electrical characteristics

ST7LUS5, ST7LU05, ST7LU09

104/124

Figure 45.

Two typical applications with unused I/O pin

Figure 46.

Typical IPU vs. VDD with VIN = VSS

The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current

characteristics described in Figure 46).

RPU not applicable on PA3 because it is multiplexed on RESET pin

To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured

as an external interrupt source.

Table 80.

Output driving current(1)

Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.

Symbol

Parameter

Conditions

Min

Max

Unit

VOL

(2)

The IIO current sunk must always respect the absolute maximum rating specified in Table 62: Current

characteristics and the sum of IIO (I/O ports and control pins) must not exceed IVSS.

Output low level voltage for PA3/RESET

standard I/O pin (see Figure 48)

IIO = +5mA

1200

IIO = +2mA

400

Output low level voltage for a high sink I/O

pin when 4 pins are sunk at same time

(see Figure 50)

IIO = +20mA

1300

IIO = +8mA

750

VOH

(3)(4)

The IIO current sourced must always respect the absolute maximum rating specified in Table 62: Current

characteristics and the sum of IIO (I/O ports and control pins) must not exceed IVDD. True open drain I/O

pins do not have VOH.

Not tested in production, based on characterization results.

Output high level voltage for an I/O pin

when 4 pins are sourced at same time

(see Figure 52)

IIO = -5mA

VDD - 1500

IIO = -2mA

VDD -800

10k

Ω

UNUSED I/O PORT

ST7XXX

10k

Ω

UNUSED I/O PORT

ST7XXX

VDD

Caution: During normal operation the ICCCLK pin must be pulled- up, internally or externally

(external pull-up of 10k mandatory in

This is to avoid entering ICC mode unexpectedly during a reset.

noisy environment).

Note: I/O can be left unconnected if it is configured as output (0 or 1) by the software. This has the advantage of greater EMC

robustness and lower cost.

VDD [V]

-45°C

25°C

90°C

ST7LUS5 数据表(PDF) 104 Page - STMicroelectronics

ST7LUS5 数据表(HTML) 104 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载