CS5320 datasheet(3/160 Pages) AMCC

3 / 160 page

Part Number S5320

Revision 5.03 – June 14, 2006

AMCC Confidential and Proprietary

DS1656

S5320

PCI Match Maker

Data Sheet

FEATURES

•

Full 132 Mbytes/sec Transfer Rate

•

PCI Bus Operation to 33 MHz

•

PCI 2.2 Compliant Target Device

•

3.3V Power Supply

•

5V Tolerant I/Os

•

Add-On Bus up to 40 MHz

•

Programmable Prefetch and Wait States

•

8/16/32-Bit Add-On Bus

•

Four Definable Pass-Thru Regions

•

Two 32-Byte Burstable FIFOs

•

Active/Passive Add-On Bus Operation

•

Mailbox Registers/w Byte Level Status

•

Direct Mailbox Data Strobe/Int Pin

•

Mailbox Read/Write Interrupts

•

Direct PCI and Add-On Interrupt Pins

•

Plug-N-Play Compatible

•

Two-wire Serial Bus nvRAM Support

•

Optional External BIOS capability

•

176-Pin Low Profile LQFP

•

Environmental Friendly Lead-free Package

Option

APPLICATIONS

•

ISA Conversions

•

Multimedia

•

I/O Ports

•

Data Storage

•CODEC5

•

General Purpose PCI Bus Interfacing

ARCHITECTURAL OVERVIEW

The AMCC S5320 was developed to provide the

designer with a single multi-function device offering a

flexible and easy way to connect to the PCI bus. By

using the S5320, the designer eliminates the task of

assuring PCI bus specification compliance and the

necessity of understanding PCI bus timing require-

ments when interfacing a new application. The S5320

was designed for 3.3V environment but its inputs/out-

puts are tolerant to 5V signaling.

The complex 33 MHz PCI bus signals are converted

through the S5320 into an easy-to-use 8/16/32-bit

user bus referred to as the user Add-On bus. The Add-

On bus allows user add-on designs bus clock speed

independent operation to 40 MHz.

CS5320 数据表(PDF) 3 Page - Applied Micro Circuits Corporation

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